From patchwork Thu Mar 15 19:19:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 886414 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 402JNQ2Jplz9sBt for ; Fri, 16 Mar 2018 06:21:10 +1100 (AEDT) Received: from localhost ([::1]:53011 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ewYR2-0000c8-3l for incoming@patchwork.ozlabs.org; Thu, 15 Mar 2018 15:21:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54486) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ewYQM-0000Yk-0c for qemu-devel@nongnu.org; Thu, 15 Mar 2018 15:20:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ewYQI-0005xt-Ry for qemu-devel@nongnu.org; Thu, 15 Mar 2018 15:20:26 -0400 Received: from mout.kundenserver.de ([212.227.126.133]:45177) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ewYQI-0005wl-C6 for qemu-devel@nongnu.org; Thu, 15 Mar 2018 15:20:22 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue007 [212.227.15.167]) with ESMTPSA (Nemesis) id 0MNRSn-1ez3OW3Faz-006yfB; Thu, 15 Mar 2018 20:20:13 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Thu, 15 Mar 2018 20:19:56 +0100 Message-Id: <20180315191958.28937-2-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180315191958.28937-1-laurent@vivier.eu> References: <20180315191958.28937-1-laurent@vivier.eu> X-Provags-ID: V03:K0:3TDN7e6pznfv4k98CGgae/qJ7MSuH3nBTzT2uMoSCH2f74RIDDf MemEnup0Nff3qokq/2IlS4QxoP2/Mv2g7ONI0mj8lqE+zUYOv1QS7AX2JzKAeSi628ioX5M jqSvUusTXveqwiUVWeoSA2lhWgbeww5WYiLQFOcGEbiPBC0Eie2zj5n8jMrd1zC6uOGnVif dTAI67Gz3RBemwYxrBPuA== X-UI-Out-Filterresults: notjunk:1; V01:K0:kbUZHL3e4Kg=:FdYqxKJlNFWGxgI3SDNGZC ivNbZUyh8V/GHdukWPhZoeBj4dAaDT0LUtFnV4sN38QV6ASxj9rTvMILhXapJjKRyaKTqMlVC WERfx5XvDTnhUwSRylT4E3RL8wettQG9Oc6kZyN85/iULTEmYxnYKBwXQA2qMzxXvI0JnSjWt KxiuMZnNIiWXw8SUbgP0PmrAXHmhnUXmTcRESM5RrCnfaB88yQjKPf+8qLgyMbVALTNAhZ54i sREm/p70w0/N9XVEJ5F8ruv3o5ag+R9zKR7g3M4wmuqC3C/GMzSAyArGoXZaISI/Efjiv/eJA RWBz0XmZZOsP7ven25W/yPk6YMDnodRHsVGtvxgP4SOZxdzcvBL3xFkIrcswZ45zyon1t4U+6 u4QmyuUc5CnW/VuGo7penddG3mshL13KdmTNdYjkmWi45Guh2cdjtyXXy2OCWWmMTVC7dJL0q RhLycytwRohsfaIxiKkW0T2k62cj2nASyG0ToECH+KcZiqLchpx8kjPzDi6B2koLqPoyzHVl8 daZ7QorwJQJr0o70/MlmLI2S0/VLLbjEfVSkvByExzdwI4pw9X+OwC+t3Mm4taFXcHslJy3yd 8V332/0hNmqjKjpYIsh0oFpUnV+0YOzT7+Rzm49JPfkGFAOngAOejhL8RgsvN7vIqV/n2Gd94 iqOPUA6W6xTTFM5igY4X7AnnXa7F9SYX9PM1KLJYJPj32NPglUApHlYnrpLuj6hjd2ppvrr8n JmrecPcr6NmcRjdnb4cARXmU6nIOBmXTEfpvUA== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.133 Subject: [Qemu-devel] [RFC 1/3] tcg: introduce tcg_temp_try_free() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" m68k has some functions returning either locally allocated TCGv or memory allocated TCGv (registers). We want to free locally allocated TCGv to avoid overflow in sequence like: 0xc00ae406: movel %fp@(-132),%fp@(-268) 0xc00ae40c: movel %fp@(-128),%fp@(-264) 0xc00ae412: movel %fp@(-20),%fp@(-212) 0xc00ae418: movel %fp@(-16),%fp@(-208) 0xc00ae41e: movel %fp@(-60),%fp@(-220) 0xc00ae424: movel %fp@(-56),%fp@(-216) 0xc00ae42a: movel %fp@(-124),%fp@(-252) 0xc00ae430: movel %fp@(-120),%fp@(-248) 0xc00ae436: movel %fp@(-12),%fp@(-260) 0xc00ae43c: movel %fp@(-8),%fp@(-256) 0xc00ae442: movel %fp@(-52),%fp@(-276) 0xc00ae448: movel %fp@(-48),%fp@(-272) ... That can fill a lot of TCGv entries in a sequence, especially since 15fa08f845 ("tcg: Dynamically allocate TCGOps") Signed-off-by: Laurent Vivier --- tcg/tcg-op.h | 2 ++ tcg/tcg.c | 28 +++++++++++++++++++++------- tcg/tcg.h | 3 +++ 3 files changed, 26 insertions(+), 7 deletions(-) diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 75bb55aeac..564e310426 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -811,6 +811,7 @@ void tcg_gen_lookup_and_goto_ptr(void); #define tcg_global_mem_new tcg_global_mem_new_i32 #define tcg_temp_local_new() tcg_temp_local_new_i32() #define tcg_temp_free tcg_temp_free_i32 +#define tcg_temp_try_free tcg_temp_try_free_i32 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32 #else @@ -819,6 +820,7 @@ void tcg_gen_lookup_and_goto_ptr(void); #define tcg_global_mem_new tcg_global_mem_new_i64 #define tcg_temp_local_new() tcg_temp_local_new_i64() #define tcg_temp_free tcg_temp_free_i64 +#define tcg_temp_try_free tcg_temp_try_free_i64 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64 #endif diff --git a/tcg/tcg.c b/tcg/tcg.c index bb24526c93..9d02c07e7a 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1072,11 +1072,15 @@ TCGv_vec tcg_temp_new_vec_matching(TCGv_vec match) return temp_tcgv_vec(t); } -static void tcg_temp_free_internal(TCGTemp *ts) +static void tcg_temp_free_internal(TCGTemp *ts, bool try) { TCGContext *s = tcg_ctx; int k, idx; + if (try && ts->temp_allocated == 0) { + return; + } + #if defined(CONFIG_DEBUG_TCG) s->temps_in_use--; if (s->temps_in_use < 0) { @@ -1095,17 +1099,27 @@ static void tcg_temp_free_internal(TCGTemp *ts) void tcg_temp_free_i32(TCGv_i32 arg) { - tcg_temp_free_internal(tcgv_i32_temp(arg)); + tcg_temp_free_internal(tcgv_i32_temp(arg), false); } void tcg_temp_free_i64(TCGv_i64 arg) { - tcg_temp_free_internal(tcgv_i64_temp(arg)); + tcg_temp_free_internal(tcgv_i64_temp(arg), false); +} + +void tcg_temp_try_free_i32(TCGv_i32 arg) +{ + tcg_temp_free_internal(tcgv_i32_temp(arg), true); +} + +void tcg_temp_try_free_i64(TCGv_i64 arg) +{ + tcg_temp_free_internal(tcgv_i64_temp(arg), true); } void tcg_temp_free_vec(TCGv_vec arg) { - tcg_temp_free_internal(tcgv_vec_temp(arg)); + tcg_temp_free_internal(tcgv_vec_temp(arg), false); } TCGv_i32 tcg_const_i32(int32_t val) @@ -1572,8 +1586,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args) for (i = real_args = 0; i < orig_nargs; ++i) { int is_64bit = orig_sizemask & (1 << (i+1)*2); if (is_64bit) { - tcg_temp_free_internal(args[real_args++]); - tcg_temp_free_internal(args[real_args++]); + tcg_temp_free_internal(args[real_args++], false); + tcg_temp_free_internal(args[real_args++], false); } else { real_args++; } @@ -1590,7 +1604,7 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args) for (i = 0; i < nargs; ++i) { int is_64bit = sizemask & (1 << (i+1)*2); if (!is_64bit) { - tcg_temp_free_internal(args[i]); + tcg_temp_free_internal(args[i], false); } } #endif /* TCG_TARGET_EXTEND_ARGS */ diff --git a/tcg/tcg.h b/tcg/tcg.h index 9e2d909a4a..e6d9dc0643 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -890,6 +890,9 @@ void tcg_temp_free_i32(TCGv_i32 arg); void tcg_temp_free_i64(TCGv_i64 arg); void tcg_temp_free_vec(TCGv_vec arg); +void tcg_temp_try_free_i32(TCGv_i32 arg); +void tcg_temp_try_free_i64(TCGv_i64 arg); + static inline TCGv_i32 tcg_global_mem_new_i32(TCGv_ptr reg, intptr_t offset, const char *name) { From patchwork Thu Mar 15 19:19:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 886419 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 402JSP4s0pz9sVT for ; Fri, 16 Mar 2018 06:24:37 +1100 (AEDT) Received: from localhost ([::1]:53030 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ewYUN-0003L7-Hi for incoming@patchwork.ozlabs.org; Thu, 15 Mar 2018 15:24:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54500) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ewYQN-0000aZ-Jx for qemu-devel@nongnu.org; Thu, 15 Mar 2018 15:20:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ewYQL-00060z-QR for qemu-devel@nongnu.org; Thu, 15 Mar 2018 15:20:27 -0400 Received: from mout.kundenserver.de ([212.227.126.133]:60865) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ewYQL-0005yk-0F for qemu-devel@nongnu.org; Thu, 15 Mar 2018 15:20:25 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue007 [212.227.15.167]) with ESMTPSA (Nemesis) id 0MEx1K-1epSjs0uxG-00G1L0; Thu, 15 Mar 2018 20:20:14 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Thu, 15 Mar 2018 20:19:57 +0100 Message-Id: <20180315191958.28937-3-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180315191958.28937-1-laurent@vivier.eu> References: <20180315191958.28937-1-laurent@vivier.eu> X-Provags-ID: V03:K0:jlgzfoIgTxF9qI/mmqpEe6f0hn9xc2UxPBYNoYGCQPF84VLXCki rHdu8BdWLz4RxISKO5HdfAvtNlsQb2/GJZ0mEuVi7J8iY74SwEMab01PqR3Ghh1tSvedUU9 rGWeX5MFYGb/gHAEnnE0G9Ug7SdsgrwgAkeXMSVXoaYAXQSr74ovpNwEgxrrrlyK79XN0E7 rDA6J8DbBFxzT8u1iW3+g== X-UI-Out-Filterresults: notjunk:1; V01:K0:Av4OMb2aofQ=:vnuttOHpy4IK1ffXqUf1Sx EBLxvjr0eXbEwJq05jtZP2sn8O3sEwyq4wYnBQFHIdTGnTS7T06ArDV1PUC6pLe3c6V6gkOq/ iDWfnwgUILn54actECh3XzhwZ45sU1UHIHiQp8ou3SRJ4tqLTQwrQ3d3p8+SCHckWC0BglGOo mRf1YrcapLEbVN3CAujCIsuJ2EUKR/pUAfMtVuV9YtaATlyo3+dFdQ9XwB8P7hRmZYV1EczSg wGkk74UtdKfgJbO3rhWirtZ1ei/gk4Qs/CK+36PicPYDqtp7N/ja1gi/r32eg6XfXzOmQNu1A f04ja4Y4mbmPNDUMi3hxvR3LxAHGXMc9tiNLSvODEITcSjcGjli91wCaVdjmEElIvke/c2Qj/ 5KsRyX4JbcdhVJecMiTQdv5Ehg8O7Vl1EaWPT1dH8fyAuLRE/eVMH+ysRFio21N7aAsCYMPR3 VKmVyB7Yr0pM2MhZwFoi5yxtVNJcLJQjgmMRWSa8gbx5+nurEzf3EWuNKiF7KdfwxsPlZfYzK m7sRxSLLyGNHMcOx251Agm/AoXXenJrMjJ3/DNiqtDtgIUWz7JmfrKl6GJWjWAbw1FK39rUSV Ew9gbM4qjijkNWYa8+CcNnAve2hva6/or3pxZMRf+J7RM6ZpQroLIDfJ7TmopygAFCBaVvJW6 k0bllwegnSq+M4/T11f34mZutkjXLe1At1Ljzw7DDCaNC5+21253YYUD9pk9KVjqIAeeMo/Pv gDnBu4eTNxoFNbwTn0/d1zEvGHYnBlytltBGtA== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.133 Subject: [Qemu-devel] [RFC 2/3] target/m68k: use tcg_temp_try_free() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" SRC_EA() and gen_extend() can return either a temporary TCGv or memory allocated one. Try to free the temporary one with tcg_temp_try_free(). Signed-off-by: Laurent Vivier --- target/m68k/translate.c | 65 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index cef6f663ad..03aa701dde 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -1550,6 +1550,7 @@ DISAS_INSN(mulw) tcg_gen_ext16u_i32(tmp, reg); SRC_EA(env, src, OS_WORD, sign, NULL); tcg_gen_mul_i32(tmp, tmp, src); + tcg_temp_try_free(src); tcg_gen_mov_i32(reg, tmp); gen_logic_cc(s, tmp, OS_LONG); tcg_temp_free(tmp); @@ -1574,6 +1575,7 @@ DISAS_INSN(divw) } else { gen_helper_divuw(cpu_env, destr, src); } + tcg_temp_try_free(src); tcg_temp_free(destr); set_cc_op(s, CC_OP_FLAGS); @@ -1605,6 +1607,7 @@ DISAS_INSN(divl) } else { gen_helper_divull(cpu_env, num, reg, den); } + tcg_temp_try_free(den); tcg_temp_free(reg); tcg_temp_free(num); set_cc_op(s, CC_OP_FLAGS); @@ -1622,6 +1625,7 @@ DISAS_INSN(divl) } else { gen_helper_divul(cpu_env, num, reg, den); } + tcg_temp_try_free(den); tcg_temp_free(reg); tcg_temp_free(num); @@ -1762,9 +1766,11 @@ DISAS_INSN(abcd_reg) src = gen_extend(DREG(insn, 0), OS_BYTE, 0); dest = gen_extend(DREG(insn, 9), OS_BYTE, 0); bcd_add(dest, src); + tcg_temp_try_free(src); gen_partset_reg(OS_BYTE, DREG(insn, 9), dest); bcd_flags(dest); + tcg_temp_try_free(dest); } DISAS_INSN(abcd_mem) @@ -1781,11 +1787,13 @@ DISAS_INSN(abcd_mem) NULL_QREG, &addr, EA_LOADU, IS_USER(s)); bcd_add(dest, src); + tcg_temp_try_free(src); gen_ea_mode(env, s, 4, REG(insn, 9), OS_BYTE, dest, &addr, EA_STORE, IS_USER(s)); bcd_flags(dest); + tcg_temp_try_free(dest); } DISAS_INSN(sbcd_reg) @@ -1798,10 +1806,12 @@ DISAS_INSN(sbcd_reg) dest = gen_extend(DREG(insn, 9), OS_BYTE, 0); bcd_sub(dest, src); + tcg_temp_try_free(src); gen_partset_reg(OS_BYTE, DREG(insn, 9), dest); bcd_flags(dest); + tcg_temp_try_free(dest); } DISAS_INSN(sbcd_mem) @@ -1818,11 +1828,13 @@ DISAS_INSN(sbcd_mem) NULL_QREG, &addr, EA_LOADU, IS_USER(s)); bcd_sub(dest, src); + tcg_temp_try_free(src); gen_ea_mode(env, s, 4, REG(insn, 9), OS_BYTE, dest, &addr, EA_STORE, IS_USER(s)); bcd_flags(dest); + tcg_temp_try_free(dest); } DISAS_INSN(nbcd) @@ -1836,6 +1848,7 @@ DISAS_INSN(nbcd) dest = tcg_const_i32(0); bcd_sub(dest, src); + tcg_temp_try_free(src); DEST_EA(env, insn, OS_BYTE, dest, &addr); @@ -1877,9 +1890,12 @@ DISAS_INSN(addsub) gen_update_cc_add(dest, src, opsize); if (insn & 0x100) { DEST_EA(env, insn, opsize, dest, &addr); + tcg_temp_try_free(tmp); } else { gen_partset_reg(opsize, DREG(insn, 9), dest); + tcg_temp_try_free(src); } + tcg_temp_try_free(reg); tcg_temp_free(dest); } @@ -1935,6 +1951,7 @@ DISAS_INSN(bitop_reg) default: /* btst */ break; } + tcg_temp_try_free(src1); tcg_temp_free(tmp); if (op) { DEST_EA(env, insn, opsize, dest, &addr); @@ -2183,6 +2200,7 @@ DISAS_INSN(bitop_im) DEST_EA(env, insn, opsize, tmp, &addr); tcg_temp_free(tmp); } + tcg_temp_try_free(src1); } static TCGv gen_get_ccr(DisasContext *s) @@ -2244,6 +2262,7 @@ static void gen_move_to_sr(CPUM68KState *env, DisasContext *s, uint16_t insn, TCGv src; SRC_EA(env, src, OS_WORD, 0, NULL); gen_set_sr(s, src, ccr_only); + tcg_temp_try_free(src); } } @@ -2306,6 +2325,7 @@ DISAS_INSN(arith_im) } else { DEST_EA(env, insn, opsize, dest, &addr); gen_logic_cc(s, dest, opsize); + tcg_temp_try_free(src1); } break; case 1: /* andi */ @@ -2315,6 +2335,7 @@ DISAS_INSN(arith_im) } else { DEST_EA(env, insn, opsize, dest, &addr); gen_logic_cc(s, dest, opsize); + tcg_temp_try_free(src1); } break; case 2: /* subi */ @@ -2323,6 +2344,7 @@ DISAS_INSN(arith_im) gen_update_cc_add(dest, im, opsize); set_cc_op(s, CC_OP_SUBB + opsize); DEST_EA(env, insn, opsize, dest, &addr); + tcg_temp_try_free(src1); break; case 3: /* addi */ tcg_gen_add_i32(dest, src1, im); @@ -2330,6 +2352,7 @@ DISAS_INSN(arith_im) tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, im); set_cc_op(s, CC_OP_ADDB + opsize); DEST_EA(env, insn, opsize, dest, &addr); + tcg_temp_try_free(src1); break; case 5: /* eori */ tcg_gen_xor_i32(dest, src1, im); @@ -2338,10 +2361,12 @@ DISAS_INSN(arith_im) } else { DEST_EA(env, insn, opsize, dest, &addr); gen_logic_cc(s, dest, opsize); + tcg_temp_try_free(src1); } break; case 6: /* cmpi */ gen_update_cc_cmp(s, src1, im, opsize); + tcg_temp_try_free(src1); break; default: abort(); @@ -2400,6 +2425,7 @@ DISAS_INSN(cas) IS_USER(s), opc); /* update flags before setting cmp to load */ gen_update_cc_cmp(s, load, cmp, opsize); + tcg_temp_try_free(cmp); gen_partset_reg(opsize, DREG(ext, 0), load); tcg_temp_free(load); @@ -2558,6 +2584,7 @@ DISAS_INSN(move) /* This will be correct because loads sign extend. */ gen_logic_cc(s, src, opsize); } + tcg_temp_try_free(src); } DISAS_INSN(negx) @@ -2590,6 +2617,7 @@ DISAS_INSN(negx) */ tcg_gen_and_i32(QREG_CC_V, QREG_CC_N, src); + tcg_temp_try_free(src); /* Copy the rest of the results into place. */ tcg_gen_or_i32(QREG_CC_Z, QREG_CC_Z, QREG_CC_N); /* !Z is sticky */ @@ -2650,6 +2678,7 @@ DISAS_INSN(neg) tcg_gen_neg_i32(dest, src1); set_cc_op(s, CC_OP_SUBB + opsize); gen_update_cc_add(dest, src1, opsize); + tcg_temp_try_free(src1); tcg_gen_setcondi_i32(TCG_COND_NE, QREG_CC_X, dest, 0); DEST_EA(env, insn, opsize, dest, &addr); tcg_temp_free(dest); @@ -2671,6 +2700,7 @@ DISAS_INSN(not) SRC_EA(env, src1, opsize, 1, &addr); dest = tcg_temp_new(); tcg_gen_not_i32(dest, src1); + tcg_temp_try_free(src1); DEST_EA(env, insn, opsize, dest, &addr); gen_logic_cc(s, dest, opsize); } @@ -2738,6 +2768,7 @@ DISAS_INSN(tst) opsize = insn_opsize(insn); SRC_EA(env, tmp, opsize, 1, NULL); gen_logic_cc(s, tmp, opsize); + tcg_temp_try_free(tmp); } DISAS_INSN(pulse) @@ -2761,6 +2792,7 @@ DISAS_INSN(tas) SRC_EA(env, src1, OS_BYTE, 1, &addr); gen_logic_cc(s, src1, OS_BYTE); tcg_gen_ori_i32(dest, src1, 0x80); + tcg_temp_try_free(src1); DEST_EA(env, insn, OS_BYTE, dest, &addr); tcg_temp_free(dest); } @@ -2788,6 +2820,7 @@ DISAS_INSN(mull) } else { tcg_gen_mulu2_i32(QREG_CC_Z, QREG_CC_N, src1, DREG(ext, 12)); } + tcg_temp_try_free(src1); /* if Dl == Dh, 68040 returns low word */ tcg_gen_mov_i32(DREG(ext, 0), QREG_CC_N); tcg_gen_mov_i32(DREG(ext, 12), QREG_CC_Z); @@ -2824,6 +2857,7 @@ DISAS_INSN(mull) tcg_gen_mul_i32(DREG(ext, 12), src1, DREG(ext, 12)); gen_logic_cc(s, DREG(ext, 12), OS_LONG); } + tcg_temp_try_free(src1); } static void gen_link(DisasContext *s, uint16_t insn, int32_t offset) @@ -2950,6 +2984,7 @@ DISAS_INSN(addsubq) val = tcg_const_i32(imm); dest = tcg_temp_new(); tcg_gen_mov_i32(dest, src); + tcg_temp_try_free(src); if ((insn & 0x38) == 0x08) { /* Don't update condition codes if the destination is an address register. */ @@ -3044,6 +3079,7 @@ DISAS_INSN(mvzs) reg = DREG(insn, 9); tcg_gen_mov_i32(reg, src); gen_logic_cc(s, src, opsize); + tcg_temp_try_free(src); } DISAS_INSN(or) @@ -3066,6 +3102,8 @@ DISAS_INSN(or) tcg_gen_or_i32(dest, src, reg); gen_partset_reg(opsize, DREG(insn, 9), dest); } + tcg_temp_try_free(reg); + tcg_temp_try_free(src); gen_logic_cc(s, dest, opsize); tcg_temp_free(dest); } @@ -3078,6 +3116,7 @@ DISAS_INSN(suba) SRC_EA(env, src, (insn & 0x100) ? OS_LONG : OS_WORD, 1, NULL); reg = AREG(insn, 9); tcg_gen_sub_i32(reg, reg, src); + tcg_temp_try_free(src); } static inline void gen_subx(DisasContext *s, TCGv src, TCGv dest, int opsize) @@ -3124,6 +3163,8 @@ DISAS_INSN(subx_reg) dest = gen_extend(DREG(insn, 9), opsize, 1); gen_subx(s, src, dest, opsize); + tcg_temp_try_free(src); + tcg_temp_try_free(dest); gen_partset_reg(opsize, DREG(insn, 9), QREG_CC_N); } @@ -3178,6 +3219,8 @@ DISAS_INSN(cmp) SRC_EA(env, src, opsize, 1, NULL); reg = gen_extend(DREG(insn, 9), opsize, 1); gen_update_cc_cmp(s, reg, src, opsize); + tcg_temp_try_free(src); + tcg_temp_try_free(reg); } DISAS_INSN(cmpa) @@ -3194,6 +3237,7 @@ DISAS_INSN(cmpa) SRC_EA(env, src, opsize, 1, NULL); reg = AREG(insn, 9); gen_update_cc_cmp(s, reg, src, OS_LONG); + tcg_temp_try_free(src); } DISAS_INSN(cmpm) @@ -3209,6 +3253,8 @@ DISAS_INSN(cmpm) NULL_QREG, NULL, EA_LOADS, IS_USER(s)); gen_update_cc_cmp(s, dst, src, opsize); + tcg_temp_try_free(src); + tcg_temp_try_free(dst); } DISAS_INSN(eor) @@ -3223,6 +3269,7 @@ DISAS_INSN(eor) SRC_EA(env, src, opsize, 0, &addr); dest = tcg_temp_new(); tcg_gen_xor_i32(dest, src, DREG(insn, 9)); + tcg_temp_try_free(src); gen_logic_cc(s, dest, opsize); DEST_EA(env, insn, opsize, dest, &addr); tcg_temp_free(dest); @@ -3276,6 +3323,7 @@ DISAS_INSN(and) tcg_gen_and_i32(dest, src, reg); gen_partset_reg(opsize, reg, dest); } + tcg_temp_try_free(src); gen_logic_cc(s, dest, opsize); tcg_temp_free(dest); } @@ -3288,6 +3336,7 @@ DISAS_INSN(adda) SRC_EA(env, src, (insn & 0x100) ? OS_LONG : OS_WORD, 1, NULL); reg = AREG(insn, 9); tcg_gen_add_i32(reg, reg, src); + tcg_temp_try_free(src); } static inline void gen_addx(DisasContext *s, TCGv src, TCGv dest, int opsize) @@ -3333,6 +3382,8 @@ DISAS_INSN(addx_reg) src = gen_extend(DREG(insn, 0), opsize, 1); gen_addx(s, src, dest, opsize); + tcg_temp_try_free(src); + tcg_temp_try_free(dest); gen_partset_reg(opsize, DREG(insn, 9), QREG_CC_N); } @@ -3404,6 +3455,7 @@ static inline void shift_im(DisasContext *s, uint16_t insn, int opsize) tcg_gen_sari_i32(QREG_CC_N, reg, count); } } + tcg_temp_try_free(reg); gen_ext(QREG_CC_N, QREG_CC_N, opsize, 1); tcg_gen_andi_i32(QREG_CC_C, QREG_CC_C, 1); @@ -3497,6 +3549,7 @@ static inline void shift_reg(DisasContext *s, uint16_t insn, int opsize) tcg_gen_movcond_i32(TCG_COND_NE, QREG_CC_X, s32, QREG_CC_V, QREG_CC_C, QREG_CC_X); } + tcg_temp_try_free(reg); gen_ext(QREG_CC_N, QREG_CC_N, opsize, 1); tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); @@ -3567,6 +3620,7 @@ DISAS_INSN(shift_mem) tcg_gen_sari_i32(QREG_CC_N, src, 1); } } + tcg_temp_try_free(src); gen_ext(QREG_CC_N, QREG_CC_N, OS_WORD, 1); tcg_gen_andi_i32(QREG_CC_C, QREG_CC_C, 1); @@ -3806,6 +3860,7 @@ DISAS_INSN(rotate8_im) } tcg_temp_free(shift); gen_partset_reg(OS_BYTE, DREG(insn, 0), reg); + tcg_temp_try_free(reg); set_cc_op(s, CC_OP_FLAGS); } @@ -3832,6 +3887,7 @@ DISAS_INSN(rotate16_im) } tcg_temp_free(shift); gen_partset_reg(OS_WORD, DREG(insn, 0), reg); + tcg_temp_try_free(reg); set_cc_op(s, CC_OP_FLAGS); } @@ -3901,6 +3957,7 @@ DISAS_INSN(rotate8_reg) tcg_temp_free(t1); tcg_temp_free(t0); gen_partset_reg(OS_BYTE, DREG(insn, 0), reg); + tcg_temp_try_free(reg); set_cc_op(s, CC_OP_FLAGS); } @@ -3936,6 +3993,7 @@ DISAS_INSN(rotate16_reg) tcg_temp_free(t1); tcg_temp_free(t0); gen_partset_reg(OS_WORD, DREG(insn, 0), reg); + tcg_temp_try_free(reg); set_cc_op(s, CC_OP_FLAGS); } @@ -3958,6 +4016,7 @@ DISAS_INSN(rotate_mem) } tcg_temp_free(shift); DEST_EA(env, insn, OS_WORD, src, &addr); + tcg_temp_try_free(src); set_cc_op(s, CC_OP_FLAGS); } @@ -4357,6 +4416,8 @@ DISAS_INSN(chk) gen_flush_flags(s); gen_helper_chk(cpu_env, reg, src); + tcg_temp_try_free(reg); + tcg_temp_try_free(src); } DISAS_INSN(chk2) @@ -5409,6 +5470,7 @@ DISAS_INSN(frestore) if (m68k_feature(s->env, M68K_FEATURE_M68040)) { SRC_EA(env, addr, OS_LONG, 0, NULL); /* FIXME: check the state frame */ + tcg_temp_try_free(addr); } else { disas_undef(env, s, insn); } @@ -5713,6 +5775,7 @@ DISAS_INSN(to_mac) } else { tcg_gen_extu_i32_i64(acc, val); } + tcg_temp_try_free(val); tcg_gen_andi_i32(QREG_MACSR, QREG_MACSR, ~(MACSR_PAV0 << accnum)); gen_mac_clear_flags(); gen_helper_mac_set_flags(cpu_env, tcg_const_i32(accnum)); @@ -5731,6 +5794,7 @@ DISAS_INSN(to_mask) TCGv val; SRC_EA(env, val, OS_LONG, 0, NULL); tcg_gen_ori_i32(QREG_MAC_MASK, val, 0xffff0000); + tcg_temp_try_free(val); } DISAS_INSN(to_mext) @@ -5745,6 +5809,7 @@ DISAS_INSN(to_mext) gen_helper_set_mac_exts(cpu_env, val, acc); else gen_helper_set_mac_extu(cpu_env, val, acc); + tcg_temp_try_free(val); } static disas_proc opcode_table[65536]; From patchwork Thu Mar 15 19:19:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 886417 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 402JQj2wCgz9sBt for ; Fri, 16 Mar 2018 06:23:09 +1100 (AEDT) Received: from localhost ([::1]:53023 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ewYSx-000286-8k for incoming@patchwork.ozlabs.org; Thu, 15 Mar 2018 15:23:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ewYQP-0000bO-11 for qemu-devel@nongnu.org; Thu, 15 Mar 2018 15:20:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ewYQL-00061B-Tn for qemu-devel@nongnu.org; Thu, 15 Mar 2018 15:20:29 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:55691) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ewYQL-0005zJ-Cn for qemu-devel@nongnu.org; Thu, 15 Mar 2018 15:20:25 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue007 [212.227.15.167]) with ESMTPSA (Nemesis) id 0La6Uk-1eCo403ZHS-00m4pa; Thu, 15 Mar 2018 20:20:15 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Thu, 15 Mar 2018 20:19:58 +0100 Message-Id: <20180315191958.28937-4-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180315191958.28937-1-laurent@vivier.eu> References: <20180315191958.28937-1-laurent@vivier.eu> X-Provags-ID: V03:K0:Gvc6o58w8vrQgSTitC39H51nRqPkLVFxsUQP6uDyLjjOOg6TzJ8 uDleMb8Rgqgxv38HCskZZS6g5zhOsXqXmjpf+tIY9jzfjzVF+xUW3oCP8w8BnvyqvzBnXcW xPFPgpPwrdHQvtPVAZawKZdQs5ckY4QyEWDbsQ1MO5SPFpdu295viojhCrsTkN7Tq/IXR0B 3XW2BbrbflIIm9FrAmKdA== X-UI-Out-Filterresults: notjunk:1; V01:K0:/xX+4m4fZig=:Cdzxx9YE1DqX4atoVsTOQR MlbY7f2vHh6UhCMz7LuedCDSXeHRSUiSCaMOclEsgGe7feTAenv5/WlDrBIyIQSedPiNBnUxn b+nwgw4EZn1nzu22CrwfFtDlQqMOaBnkLkzAZUw5vPNdlhcnjc8ZlGKSGHyYW+v4quSrOb2SE 40YR3GW9N44ZALE9LD5UCAkpTrhqa0+XKW9zW1JAZcHPVlit0ZnsFV5TzMz6/jx7N7u77fP+b ex+MzRnDtIJHVW1qif3P6PPLjwFT/HIQJZVVRoYp7qb9Zc+57yr95uIJf4cg+o/w81DIN3CjE MXVjigteb6mmywS4Z68HhinW3Rb3rJ978fWL+1SOardOOnmOZvXGgdlDsMrOjmbKdPedIKruY tNmaLhQoN+5JeedVcXK+rRXYyBydB+yEE/P/9fCpLLx2tfEXDQEom2GQJtPjyFrA641eBY4O9 WeXT5g4W+JzucQokGHCbUJagXZH2P4/hFN90SH9qcGvweGq+LA+5/uoGlbAqkiClm7WulP+mG TM6PQ62mksuOpQLrjsO6CREsxwfibE4B81Q6cfOtrhapUCOOU76W+TkI+xpk64e+c2tRaOBnM DarLhyiUbR6DkEUMyM4LcOLxmtO5M30yxpP3wlDTglCNjCt68K4Ai6ArJzMMfcmGiaxg1LOQ0 sfLcn4LhzlvOuj7uSKV3BMQXU2J9NizDNCimj1IvVCCFnPS9imOHpd6o/w7UfMNjq3QQsaJOd TdnnB87ci/ljoFks2lp+67+I48LOpft12y3+AQ== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.131 Subject: [Qemu-devel] [RFC 3/3] m68k: Test if we overflow the temp variable array X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Since commit 15fa08f845 ("tcg: Dynamically allocate TCGOps") we have no limit to fill the TCGOps cache and we can fill the entire TCG variables array and overflow it. To avoid that, we stop the translation when the array is close to be full. Signed-off-by: Laurent Vivier --- target/m68k/translate.c | 2 +- tcg/tcg.h | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 03aa701dde..e235be46ba 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -6155,7 +6155,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) dc->insn_pc = dc->pc; disas_m68k_insn(env, dc); - } while (!dc->is_jmp && !tcg_op_buf_full() && + } while (!dc->is_jmp && !tcg_op_buf_full() && !tcg_temp_full(64) && !cs->singlestep_enabled && !singlestep && (pc_offset) < (TARGET_PAGE_SIZE - 32) && diff --git a/tcg/tcg.h b/tcg/tcg.h index e6d9dc0643..ccfe050e27 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -836,6 +836,12 @@ static inline bool tcg_op_buf_full(void) { return false; } +/* Test if we overflow the temp variable array */ + +static inline bool tcg_temp_full(int marging) +{ + return tcg_ctx->nb_temps > TCG_MAX_TEMPS - marging; +} /* pool based memory allocation */