From patchwork Mon Apr 25 01:34:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lu Gao X-Patchwork-Id: 1621662 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=Verisilicon.com header.i=@Verisilicon.com header.a=rsa-sha256 header.s=default header.b=Q1bDV1c+; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Kmndm75Yhz9s2R for ; Mon, 25 Apr 2022 11:35:39 +1000 (AEST) Received: from localhost ([::1]:43140 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nindX-0007kT-Ag for incoming@patchwork.ozlabs.org; Sun, 24 Apr 2022 21:35:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45682) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nind9-0007js-Ft; Sun, 24 Apr 2022 21:35:11 -0400 Received: from shasxm06.verisilicon.com ([101.89.135.45]:48271 helo=shasxm03.verisilicon.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1nind6-00049p-J4; Sun, 24 Apr 2022 21:35:11 -0400 Content-Language: zh-CN DKIM-Signature: v=1; a=rsa-sha256; d=Verisilicon.com; s=default; c=simple/simple; t=1650850496; h=from:subject:to:date:message-id; bh=mSBA5V8WemKQCB/9qC2WBcWoTyw2cofbxrNMeMLp18U=; b=Q1bDV1c+tvaGjuOi4pQbLGCUtYlS4U2Iwc1nsb6b2zr6xDzGx5r9BrbDoa9cvrb1+AGjNQ0VJkE +ivGM5PB3BDk2kYBE6JrzYuAps6H/VxzJw6H/UC7mJnXQuMI+MZtAmxP4uCh07QBQeIGJAWqm3WYo 3HGqWaXEDsEh8UyD5G8= Received: from SHASXM03.verisilicon.com ([fe80::938:4dda:a2f9:38aa]) by SHASXM06.verisilicon.com ([fe80::59a8:ce34:dc14:ddda%16]) with mapi id 14.03.0408.000; Mon, 25 Apr 2022 09:34:54 +0800 From: "Gao, Lu" To: "Gao, Lu" , "qemu-devel@nongnu.org" Subject: =?eucgb2312_cn?b?tPC4tDogW1BBVENIXSBody9zZC9zZGhjaTogQmxvY2sgU2l6ZSBSZWdp?= =?eucgb2312_cn?b?c3RlciBiaXRzIFsxNDoxMl0gaXMgbG9zdA==?= Thread-Topic: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost Thread-Index: AQHYPOiHQ0Dy2cvFy0+IfX/zeZSb4q0ADs8A Date: Mon, 25 Apr 2022 01:34:53 +0000 Message-ID: <34781C803212B140A51E6B66D9092E5D01A9223DE1@SHASXM03.verisilicon.com> References: <20220321055618.4026-1-lu.gao@verisilicon.com> In-Reply-To: <20220321055618.4026-1-lu.gao@verisilicon.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.10.166.42] x-tm-as-product-ver: SMEX-11.0.0.4283-8.100.1062-25628.004 x-tm-as-result: No--4.129300-0.000000-31 x-tm-as-matchedid: 151186-700225-703140-701090-703503-139703-106230-704010-7 03408-704706-702880-700523-704186-704318-703880-700535-700598-703001-705244 -703115-704822-701510-705248-704240-702395-188019-704477-703968-702898-7009 46-703953-704959-702299-701812-703812-704990-702975-704849-704823-899220-63 -148004-148133-42000-42003-63 x-tm-as-user-approved-sender: Yes x-tm-as-user-blocked-sender: No MIME-Version: 1.0 Received-SPF: pass client-ip=101.89.135.45; envelope-from=Lu.Gao@verisilicon.com; helo=shasxm03.verisilicon.com X-Spam_score_int: 35 X-Spam_score: 3.5 X-Spam_bar: +++ X-Spam_report: (3.5 / 5.0 requ) BAYES_00=-1.9, CHARSET_FARAWAY_HEADER=3.2, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, MIME_CHARSET_FARAWAY=2.45, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng , "Wen, Jianxian" , =?eucgb2312_cn?b?UGhpbGlwcGUgTWF0aGll?= =?eucgb2312_cn?b?dS1EYXVkqKY=?= , "open list:SD \(Secure Card\)" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" ping https://patchew.org/QEMU/20220321055618.4026-1-lu.gao@verisilicon.com/ Please help review the patch. Thanks. B.R. -----邮件原件----- 发件人: Gao, Lu 发送时间: Monday, March 21, 2022 1:56 PM 收件人: qemu-devel@nongnu.org 抄送: Gao, Lu; Wen, Jianxian; Philippe Mathieu-Daudé; Bin Meng; open list:SD (Secure Card) 主题: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed in register write, but it is needed in SDMA transfer. e.g. it will be used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables. Missing this field will cause wrong operation for different SDMA Buffer Boundary settings. Signed-off-by: Lu Gao Signed-off-by: Jianxian Wen --- hw/sd/sdhci.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index e0bbc90344..350ceb487d 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -321,6 +321,8 @@ static void sdhci_poweron_reset(DeviceState *dev) static void sdhci_data_transfer(void *opaque); +#define BLOCK_SIZE_MASK (4 * KiB - 1) + static void sdhci_send_command(SDHCIState *s) { SDRequest request; @@ -371,7 +373,8 @@ static void sdhci_send_command(SDHCIState *s) sdhci_update_irq(s); - if (!timeout && s->blksize && (s->cmdreg & SDHC_CMD_DATA_PRESENT)) { + if (!timeout && (s->blksize & BLOCK_SIZE_MASK) && + (s->cmdreg & SDHC_CMD_DATA_PRESENT)) { s->data_count = 0; sdhci_data_transfer(s); } @@ -406,7 +409,6 @@ static void sdhci_end_transfer(SDHCIState *s) /* * Programmed i/o data transfer */ -#define BLOCK_SIZE_MASK (4 * KiB - 1) /* Fill host controller's read buffer with BLKSIZE bytes of data from card */ static void sdhci_read_block_from_card(SDHCIState *s) @@ -1137,7 +1139,8 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) s->sdmasysad = (s->sdmasysad & mask) | value; MASKED_WRITE(s->sdmasysad, mask, value); /* Writing to last byte of sdmasysad might trigger transfer */ - if (!(mask & 0xFF000000) && s->blkcnt && s->blksize && + if (!(mask & 0xFF000000) && s->blkcnt && + (s->blksize & BLOCK_SIZE_MASK) && SDHC_DMA_TYPE(s->hostctl1) == SDHC_CTRL_SDMA) { if (s->trnmod & SDHC_TRNS_MULTI) { sdhci_sdma_transfer_multi_blocks(s); @@ -1151,7 +1154,11 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) if (!TRANSFERRING_DATA(s->prnsts)) { uint16_t blksize = s->blksize; - MASKED_WRITE(s->blksize, mask, extract32(value, 0, 12)); + /* + * [14:12] SDMA Buffer Boundary + * [11:00] Transfer Block Size + */ + MASKED_WRITE(s->blksize, mask, extract32(value, 0, 15)); MASKED_WRITE(s->blkcnt, mask >> 16, value >> 16); /* Limit block size to the maximum buffer size */