From patchwork Mon Apr 18 16:38:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618444 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Kht6j5Fyqz9sG6 for ; Tue, 19 Apr 2022 02:43:41 +1000 (AEST) Received: from localhost ([::1]:56890 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUTT-0003hR-Op for incoming@patchwork.ozlabs.org; Mon, 18 Apr 2022 12:43:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38706) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ngUPU-0006Wz-9Q; Mon, 18 Apr 2022 12:39:32 -0400 Received: from [187.72.171.209] (port=20022 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUPR-0006A6-Nq; Mon, 18 Apr 2022 12:39:32 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Mon, 18 Apr 2022 13:39:01 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 6D04380060F; Mon, 18 Apr 2022 13:39:01 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 01/10] target/ppc: Fix insn32.decode style issues Date: Mon, 18 Apr 2022 13:38:14 -0300 Message-Id: <20220418163823.61866-2-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:01.0802 (UTC) FILETIME=[CF48A0A0:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Some lines in insn32.decode have inconsistent alignment when compared to others. Fix this by changing the alignment of some lines, making it more consistent throughout the file. Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index ac2d3da9a7..accfc8418b 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -18,11 +18,11 @@ # &D rt ra si:int64_t -@D ...... rt:5 ra:5 si:s16 &D +@D ...... rt:5 ra:5 si:s16 &D &D_bf bf l:bool ra imm -@D_bfs ...... bf:3 - l:1 ra:5 imm:s16 &D_bf -@D_bfu ...... bf:3 - l:1 ra:5 imm:16 &D_bf +@D_bfs ...... bf:3 . l:1 ra:5 imm:s16 &D_bf +@D_bfu ...... bf:3 . l:1 ra:5 imm:16 &D_bf %dq_si 4:s12 !function=times_16 %dq_rtp 22:4 !function=times_2 @@ -35,7 +35,7 @@ @DQ_TSXP ...... ..... ra:5 ............ .... &D si=%dq_si rt=%rt_tsxp %ds_si 2:s14 !function=times_4 -@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si +@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si %ds_rtp 22:4 !function=times_2 @DS_rtp ...... ....0 ra:5 .............. .. &D rt=%ds_rtp si=%ds_si @@ -46,10 +46,10 @@ &DX rt d %dx_d 6:s10 16:5 0:1 -@DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d +@DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d &VA vrt vra vrb rc -@VA ...... vrt:5 vra:5 vrb:5 rc:5 ...... &VA +@VA ...... vrt:5 vra:5 vrb:5 rc:5 ...... &VA &VC vrt vra vrb rc:bool @VC ...... vrt:5 vra:5 vrb:5 rc:1 .......... &VC @@ -58,7 +58,7 @@ @VN ...... vrt:5 vra:5 vrb:5 .. sh:3 ...... &VN &VX vrt vra vrb -@VX ...... vrt:5 vra:5 vrb:5 .......... . &VX +@VX ...... vrt:5 vra:5 vrb:5 .......... . &VX &VX_bf bf vra vrb @VX_bf ...... bf:3 .. vra:5 vrb:5 ........... &VX_bf @@ -73,13 +73,13 @@ @VX_tb_rc ...... vrt:5 ..... vrb:5 rc:1 .......... &VX_tb_rc &VX_uim4 vrt uim vrb -@VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4 +@VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4 &VX_tb vrt vrb -@VX_tb ...... vrt:5 ..... vrb:5 ........... &VX_tb +@VX_tb ...... vrt:5 ..... vrb:5 ........... &VX_tb &X rt ra rb -@X ...... rt:5 ra:5 rb:5 .......... . &X +@X ...... rt:5 ra:5 rb:5 .......... . &X &X_rc rt ra rb rc:bool @X_rc ...... rt:5 ra:5 rb:5 .......... rc:1 &X_rc @@ -101,7 +101,7 @@ @X_t_bp_rc ...... rt:5 ..... ....0 .......... rc:1 &X_tb_rc rb=%x_frbp &X_bi rt bi -@X_bi ...... rt:5 bi:5 ----- .......... - &X_bi +@X_bi ...... rt:5 bi:5 ..... .......... . &X_bi &X_bf bf ra rb @X_bf ...... bf:3 .. ra:5 rb:5 .......... . &X_bf @@ -116,7 +116,7 @@ @X_bf_uim_bp ...... bf:3 . uim:6 ....0 .......... . &X_bf_uim rb=%x_frbp &X_bfl bf l:bool ra rb -@X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl +@X_bfl ...... bf:3 . l:1 ra:5 rb:5 .......... . &X_bfl %x_xt 0:1 21:5 &X_imm5 xt imm:uint8_t vrb From patchwork Mon Apr 18 16:38:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618451 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KhtCr3bpNz9sG6 for ; Tue, 19 Apr 2022 02:48:08 +1000 (AEST) Received: from localhost ([::1]:37242 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUXm-00017X-2H for incoming@patchwork.ozlabs.org; Mon, 18 Apr 2022 12:48:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38720) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ngUPW-0006bj-VC; Mon, 18 Apr 2022 12:39:34 -0400 Received: from [187.72.171.209] (port=20022 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUPV-0006A6-7X; Mon, 18 Apr 2022 12:39:34 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Mon, 18 Apr 2022 13:39:02 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id B330D8000A0; Mon, 18 Apr 2022 13:39:01 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 02/10] target/ppc: Move mffs[.] to decodetree Date: Mon, 18 Apr 2022 13:38:15 -0300 Message-Id: <20220418163823.61866-3-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:02.0139 (UTC) FILETIME=[CF7C0CB0:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 7 +++++++ target/ppc/translate/fp-impl.c.inc | 25 +++++++++++++++++++++++++ target/ppc/translate/fp-ops.c.inc | 1 - 3 files changed, 32 insertions(+), 1 deletion(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index accfc8418b..29a7840130 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -91,6 +91,9 @@ @X_tp_a_bp_rc ...... ....0 ra:5 ....0 .......... rc:1 &X_rc rt=%x_frtp rb=%x_frbp +&X_t_rc rt rc:bool +@X_t_rc ...... rt:5 ..... ..... .......... rc:1 &X_t_rc + &X_tb_rc rt rb rc:bool @X_tb_rc ...... rt:5 ..... rb:5 .......... rc:1 &X_tb_rc @@ -312,6 +315,10 @@ SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi +### Move To/From FPSCR + +MFFS 111111 ..... 00000 ----- 1001000111 . @X_t_rc + ### Decimal Floating-Point Arithmetic Instructions DADD 111011 ..... ..... ..... 0000000010 . @X_rc diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index cfb27bd020..e167f7a478 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -607,6 +607,31 @@ static void gen_mffs(DisasContext *ctx) tcg_temp_free_i64(t0); } +static void do_mffsc(int rt) +{ + TCGv_i64 fpscr; + + fpscr = tcg_temp_new_i64(); + + gen_reset_fpstatus(); + tcg_gen_extu_tl_i64(fpscr, cpu_fpscr); + set_fpr(rt, fpscr); + + tcg_temp_free_i64(fpscr); +} + +static bool trans_MFFS(DisasContext *ctx, arg_X_t_rc *a) +{ + REQUIRE_FPU(ctx); + + do_mffsc(a->rt); + if (a->rc) { + gen_set_cr1_from_fpscr(ctx); + } + + return true; +} + /* mffsl */ static void gen_mffsl(DisasContext *ctx) { diff --git a/target/ppc/translate/fp-ops.c.inc b/target/ppc/translate/fp-ops.c.inc index 4260635a12..7aa4011ef3 100644 --- a/target/ppc/translate/fp-ops.c.inc +++ b/target/ppc/translate/fp-ops.c.inc @@ -75,7 +75,6 @@ GEN_HANDLER_E(fcpsgn, 0x3F, 0x08, 0x00, 0x00000000, PPC_NONE, PPC2_ISA205), GEN_HANDLER_E(fmrgew, 0x3F, 0x06, 0x1E, 0x00000001, PPC_NONE, PPC2_VSX207), GEN_HANDLER_E(fmrgow, 0x3F, 0x06, 0x1A, 0x00000001, PPC_NONE, PPC2_VSX207), GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT), -GEN_HANDLER_E_2(mffs, 0x3F, 0x07, 0x12, 0x00, 0x00000000, PPC_FLOAT, PPC_NONE), GEN_HANDLER_E_2(mffsce, 0x3F, 0x07, 0x12, 0x01, 0x00000000, PPC_FLOAT, PPC2_ISA300), GEN_HANDLER_E_2(mffsl, 0x3F, 0x07, 0x12, 0x18, 0x00000000, PPC_FLOAT, From patchwork Mon Apr 18 16:38:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618439 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Kht3n4tjSz9sG6 for ; Tue, 19 Apr 2022 02:41:09 +1000 (AEST) Received: from localhost ([::1]:49296 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUR1-0006to-My for incoming@patchwork.ozlabs.org; Mon, 18 Apr 2022 12:41:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38734) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ngUPZ-0006h8-80; Mon, 18 Apr 2022 12:39:37 -0400 Received: from [187.72.171.209] (port=20022 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUPX-0006A6-OG; Mon, 18 Apr 2022 12:39:36 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Mon, 18 Apr 2022 13:39:02 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 05D9A80060F; Mon, 18 Apr 2022 13:39:02 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 03/10] target/ppc: Move mffsl to decodetree Date: Mon, 18 Apr 2022 13:38:16 -0300 Message-Id: <20220418163823.61866-4-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:02.0342 (UTC) FILETIME=[CF9B0660:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 4 ++++ target/ppc/translate/fp-impl.c.inc | 27 ++++++++------------------- target/ppc/translate/fp-ops.c.inc | 2 -- 3 files changed, 12 insertions(+), 21 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 29a7840130..08adcf087a 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -91,6 +91,9 @@ @X_tp_a_bp_rc ...... ....0 ra:5 ....0 .......... rc:1 &X_rc rt=%x_frtp rb=%x_frbp +&X_t rt +@X_t ...... rt:5 ..... ..... .......... . &X_t + &X_t_rc rt rc:bool @X_t_rc ...... rt:5 ..... ..... .......... rc:1 &X_t_rc @@ -318,6 +321,7 @@ SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi ### Move To/From FPSCR MFFS 111111 ..... 00000 ----- 1001000111 . @X_t_rc +MFFSL 111111 ..... 11000 ----- 1001000111 - @X_t ### Decimal Floating-Point Arithmetic Instructions diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index e167f7a478..22b0605e24 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -607,7 +607,7 @@ static void gen_mffs(DisasContext *ctx) tcg_temp_free_i64(t0); } -static void do_mffsc(int rt) +static void do_mffsc(int rt, uint64_t set_mask) { TCGv_i64 fpscr; @@ -615,6 +615,7 @@ static void do_mffsc(int rt) gen_reset_fpstatus(); tcg_gen_extu_tl_i64(fpscr, cpu_fpscr); + tcg_gen_andi_i64(fpscr, fpscr, set_mask); set_fpr(rt, fpscr); tcg_temp_free_i64(fpscr); @@ -624,7 +625,7 @@ static bool trans_MFFS(DisasContext *ctx, arg_X_t_rc *a) { REQUIRE_FPU(ctx); - do_mffsc(a->rt); + do_mffsc(a->rt, 0xFFFFFFFFFFFFFFFFULL); if (a->rc) { gen_set_cr1_from_fpscr(ctx); } @@ -632,26 +633,14 @@ static bool trans_MFFS(DisasContext *ctx, arg_X_t_rc *a) return true; } -/* mffsl */ -static void gen_mffsl(DisasContext *ctx) +static bool trans_MFFSL(DisasContext *ctx, arg_X_t *a) { - TCGv_i64 t0; + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_FPU(ctx); - if (unlikely(!(ctx->insns_flags2 & PPC2_ISA300))) { - return gen_mffs(ctx); - } + do_mffsc(a->rt, FP_DRN | FP_STATUS | FP_ENABLES | FP_NI | FP_RN); - if (unlikely(!ctx->fpu_enabled)) { - gen_exception(ctx, POWERPC_EXCP_FPU); - return; - } - t0 = tcg_temp_new_i64(); - gen_reset_fpstatus(); - tcg_gen_extu_tl_i64(t0, cpu_fpscr); - /* Mask everything except mode, status, and enables. */ - tcg_gen_andi_i64(t0, t0, FP_DRN | FP_STATUS | FP_ENABLES | FP_RN); - set_fpr(rD(ctx->opcode), t0); - tcg_temp_free_i64(t0); + return true; } /* mffsce */ diff --git a/target/ppc/translate/fp-ops.c.inc b/target/ppc/translate/fp-ops.c.inc index 7aa4011ef3..fe7dd1d1bb 100644 --- a/target/ppc/translate/fp-ops.c.inc +++ b/target/ppc/translate/fp-ops.c.inc @@ -77,8 +77,6 @@ GEN_HANDLER_E(fmrgow, 0x3F, 0x06, 0x1A, 0x00000001, PPC_NONE, PPC2_VSX207), GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT), GEN_HANDLER_E_2(mffsce, 0x3F, 0x07, 0x12, 0x01, 0x00000000, PPC_FLOAT, PPC2_ISA300), -GEN_HANDLER_E_2(mffsl, 0x3F, 0x07, 0x12, 0x18, 0x00000000, PPC_FLOAT, - PPC2_ISA300), GEN_HANDLER_E_2(mffscrn, 0x3F, 0x07, 0x12, 0x16, 0x00000000, PPC_FLOAT, PPC_NONE), GEN_HANDLER_E_2(mffscrni, 0x3F, 0x07, 0x12, 0x17, 0x00000000, PPC_FLOAT, From patchwork Mon Apr 18 16:38:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618440 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Kht3p3N3lz9sG6 for ; Tue, 19 Apr 2022 02:41:10 +1000 (AEST) Received: from localhost ([::1]:49244 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUR2-0006ro-GI for incoming@patchwork.ozlabs.org; Mon, 18 Apr 2022 12:41:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38750) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ngUPb-0006nH-M5; Mon, 18 Apr 2022 12:39:39 -0400 Received: from [187.72.171.209] (port=20022 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUPa-0006A6-67; Mon, 18 Apr 2022 12:39:39 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Mon, 18 Apr 2022 13:39:02 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 44C388000A0; Mon, 18 Apr 2022 13:39:02 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 04/10] target/ppc: Move mffsce to decodetree Date: Mon, 18 Apr 2022 13:38:17 -0300 Message-Id: <20220418163823.61866-5-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:02.0592 (UTC) FILETIME=[CFC12C00:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 1 + target/ppc/translate/fp-impl.c.inc | 45 +++++++++++------------------- target/ppc/translate/fp-ops.c.inc | 2 -- 3 files changed, 18 insertions(+), 30 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 08adcf087a..602ab49c9c 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -322,6 +322,7 @@ SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi MFFS 111111 ..... 00000 ----- 1001000111 . @X_t_rc MFFSL 111111 ..... 11000 ----- 1001000111 - @X_t +MFFSCE 111111 ..... 00001 ----- 1001000111 - @X_t ### Decimal Floating-Point Arithmetic Instructions diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index 22b0605e24..4520edc439 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -607,7 +607,8 @@ static void gen_mffs(DisasContext *ctx) tcg_temp_free_i64(t0); } -static void do_mffsc(int rt, uint64_t set_mask) +static void do_mffsc(int rt, TCGv_i64 t1, uint64_t set_mask, + uint64_t clear_mask, uint32_t fpscr_mask) { TCGv_i64 fpscr; @@ -618,6 +619,12 @@ static void do_mffsc(int rt, uint64_t set_mask) tcg_gen_andi_i64(fpscr, fpscr, set_mask); set_fpr(rt, fpscr); + if (fpscr_mask) { + tcg_gen_andi_i64(fpscr, fpscr, clear_mask); + tcg_gen_or_i64(fpscr, fpscr, t1); + gen_helper_store_fpscr(cpu_env, fpscr, tcg_constant_i32(fpscr_mask)); + } + tcg_temp_free_i64(fpscr); } @@ -625,7 +632,7 @@ static bool trans_MFFS(DisasContext *ctx, arg_X_t_rc *a) { REQUIRE_FPU(ctx); - do_mffsc(a->rt, 0xFFFFFFFFFFFFFFFFULL); + do_mffsc(a->rt, tcg_constant_i64(0), 0xFFFFFFFFFFFFFFFFULL, 0, 0); if (a->rc) { gen_set_cr1_from_fpscr(ctx); } @@ -638,39 +645,21 @@ static bool trans_MFFSL(DisasContext *ctx, arg_X_t *a) REQUIRE_INSNS_FLAGS2(ctx, ISA300); REQUIRE_FPU(ctx); - do_mffsc(a->rt, FP_DRN | FP_STATUS | FP_ENABLES | FP_NI | FP_RN); + do_mffsc(a->rt, tcg_constant_i64(0), + FP_DRN | FP_STATUS | FP_ENABLES | FP_NI | FP_RN, 0, 0); return true; } -/* mffsce */ -static void gen_mffsce(DisasContext *ctx) +static bool trans_MFFSCE(DisasContext *ctx, arg_X_t *a) { - TCGv_i64 t0; - TCGv_i32 mask; - - if (unlikely(!(ctx->insns_flags2 & PPC2_ISA300))) { - return gen_mffs(ctx); - } - - if (unlikely(!ctx->fpu_enabled)) { - gen_exception(ctx, POWERPC_EXCP_FPU); - return; - } - - t0 = tcg_temp_new_i64(); - - gen_reset_fpstatus(); - tcg_gen_extu_tl_i64(t0, cpu_fpscr); - set_fpr(rD(ctx->opcode), t0); + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_FPU(ctx); - /* Clear exception enable bits in the FPSCR. */ - tcg_gen_andi_i64(t0, t0, ~FP_ENABLES); - mask = tcg_const_i32(0x0003); - gen_helper_store_fpscr(cpu_env, t0, mask); + do_mffsc(a->rt, tcg_constant_i64(0), 0xFFFFFFFFFFFFFFFFULL, + ~FP_ENABLES, 0x0003); - tcg_temp_free_i32(mask); - tcg_temp_free_i64(t0); + return true; } static void gen_helper_mffscrn(DisasContext *ctx, TCGv_i64 t1) diff --git a/target/ppc/translate/fp-ops.c.inc b/target/ppc/translate/fp-ops.c.inc index fe7dd1d1bb..46357a3c4c 100644 --- a/target/ppc/translate/fp-ops.c.inc +++ b/target/ppc/translate/fp-ops.c.inc @@ -75,8 +75,6 @@ GEN_HANDLER_E(fcpsgn, 0x3F, 0x08, 0x00, 0x00000000, PPC_NONE, PPC2_ISA205), GEN_HANDLER_E(fmrgew, 0x3F, 0x06, 0x1E, 0x00000001, PPC_NONE, PPC2_VSX207), GEN_HANDLER_E(fmrgow, 0x3F, 0x06, 0x1A, 0x00000001, PPC_NONE, PPC2_VSX207), GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT), -GEN_HANDLER_E_2(mffsce, 0x3F, 0x07, 0x12, 0x01, 0x00000000, PPC_FLOAT, - PPC2_ISA300), GEN_HANDLER_E_2(mffscrn, 0x3F, 0x07, 0x12, 0x16, 0x00000000, PPC_FLOAT, PPC_NONE), GEN_HANDLER_E_2(mffscrni, 0x3F, 0x07, 0x12, 0x17, 0x00000000, PPC_FLOAT, From patchwork Mon Apr 18 16:38:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618441 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Kht4q4MCtz9sG6 for ; Tue, 19 Apr 2022 02:42:03 +1000 (AEST) Received: from localhost ([::1]:50584 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngURt-0007m5-L6 for incoming@patchwork.ozlabs.org; Mon, 18 Apr 2022 12:42:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38768) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ngUPe-0006ub-EJ; Mon, 18 Apr 2022 12:39:42 -0400 Received: from [187.72.171.209] (port=20022 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUPc-0006A6-NR; Mon, 18 Apr 2022 12:39:42 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Mon, 18 Apr 2022 13:39:02 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 84E2580060F; Mon, 18 Apr 2022 13:39:02 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 05/10] target/ppc: Move mffscrn[i] to decodetree Date: Mon, 18 Apr 2022 13:38:18 -0300 Message-Id: <20220418163823.61866-6-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:02.0857 (UTC) FILETIME=[CFE99B90:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 8 +++ target/ppc/internal.h | 3 -- target/ppc/translate/fp-impl.c.inc | 80 ++++++------------------------ target/ppc/translate/fp-ops.c.inc | 4 -- 4 files changed, 23 insertions(+), 72 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 602ab49c9c..177aa49878 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -94,6 +94,9 @@ &X_t rt @X_t ...... rt:5 ..... ..... .......... . &X_t +&X_tb rt rb +@X_tb ...... rt:5 ..... rb:5 .......... . &X_tb + &X_t_rc rt rc:bool @X_t_rc ...... rt:5 ..... ..... .......... rc:1 &X_t_rc @@ -124,6 +127,9 @@ &X_bfl bf l:bool ra rb @X_bfl ...... bf:3 . l:1 ra:5 rb:5 .......... . &X_bfl +&X_imm2 rt imm +@X_imm2 ...... rt:5 ..... ... imm:2 .......... . &X_imm2 + %x_xt 0:1 21:5 &X_imm5 xt imm:uint8_t vrb @X_imm5 ...... ..... imm:5 vrb:5 .......... . &X_imm5 xt=%x_xt @@ -323,6 +329,8 @@ SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi MFFS 111111 ..... 00000 ----- 1001000111 . @X_t_rc MFFSL 111111 ..... 11000 ----- 1001000111 - @X_t MFFSCE 111111 ..... 00001 ----- 1001000111 - @X_t +MFFSCRN 111111 ..... 10110 ..... 1001000111 - @X_tb +MFFSCRNI 111111 ..... 10111 ---.. 1001000111 - @X_imm2 ### Decimal Floating-Point Arithmetic Instructions diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 6aa9484f34..43c4cdb359 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -157,9 +157,6 @@ EXTRACT_HELPER(FPL, 25, 1); EXTRACT_HELPER(FPFLM, 17, 8); EXTRACT_HELPER(FPW, 16, 1); -/* mffscrni */ -EXTRACT_HELPER(RM, 11, 2); - /* addpcis */ EXTRACT_HELPER_SPLIT_3(DX, 10, 6, 6, 5, 16, 1, 1, 0, 0) #if defined(TARGET_PPC64) diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index 4520edc439..b294e286fb 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -589,24 +589,6 @@ static void gen_mcrfs(DisasContext *ctx) tcg_temp_free_i64(tnew_fpscr); } -/* mffs */ -static void gen_mffs(DisasContext *ctx) -{ - TCGv_i64 t0; - if (unlikely(!ctx->fpu_enabled)) { - gen_exception(ctx, POWERPC_EXCP_FPU); - return; - } - t0 = tcg_temp_new_i64(); - gen_reset_fpstatus(); - tcg_gen_extu_tl_i64(t0, cpu_fpscr); - set_fpr(rD(ctx->opcode), t0); - if (unlikely(Rc(ctx->opcode))) { - gen_set_cr1_from_fpscr(ctx); - } - tcg_temp_free_i64(t0); -} - static void do_mffsc(int rt, TCGv_i64 t1, uint64_t set_mask, uint64_t clear_mask, uint32_t fpscr_mask) { @@ -662,71 +644,39 @@ static bool trans_MFFSCE(DisasContext *ctx, arg_X_t *a) return true; } -static void gen_helper_mffscrn(DisasContext *ctx, TCGv_i64 t1) -{ - TCGv_i64 t0 = tcg_temp_new_i64(); - TCGv_i32 mask = tcg_const_i32(0x0001); - - gen_reset_fpstatus(); - tcg_gen_extu_tl_i64(t0, cpu_fpscr); - tcg_gen_andi_i64(t0, t0, FP_DRN | FP_ENABLES | FP_RN); - set_fpr(rD(ctx->opcode), t0); - - /* Mask FPSCR value to clear RN. */ - tcg_gen_andi_i64(t0, t0, ~FP_RN); - - /* Merge RN into FPSCR value. */ - tcg_gen_or_i64(t0, t0, t1); - - gen_helper_store_fpscr(cpu_env, t0, mask); - - tcg_temp_free_i32(mask); - tcg_temp_free_i64(t0); -} - -/* mffscrn */ -static void gen_mffscrn(DisasContext *ctx) +static bool trans_MFFSCRN(DisasContext *ctx, arg_X_tb *a) { TCGv_i64 t1; - if (unlikely(!(ctx->insns_flags2 & PPC2_ISA300))) { - return gen_mffs(ctx); - } - - if (unlikely(!ctx->fpu_enabled)) { - gen_exception(ctx, POWERPC_EXCP_FPU); - return; - } + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_FPU(ctx); t1 = tcg_temp_new_i64(); - get_fpr(t1, rB(ctx->opcode)); - /* Mask FRB to get just RN. */ + get_fpr(t1, a->rb); tcg_gen_andi_i64(t1, t1, FP_RN); - gen_helper_mffscrn(ctx, t1); + do_mffsc(a->rt, t1, FP_DRN | FP_ENABLES | FP_NI | FP_RN, ~FP_RN, 0x0001); tcg_temp_free_i64(t1); + + return true; } -/* mffscrni */ -static void gen_mffscrni(DisasContext *ctx) +static bool trans_MFFSCRNI(DisasContext *ctx, arg_X_imm2 *a) { TCGv_i64 t1; - if (unlikely(!(ctx->insns_flags2 & PPC2_ISA300))) { - return gen_mffs(ctx); - } - - if (unlikely(!ctx->fpu_enabled)) { - gen_exception(ctx, POWERPC_EXCP_FPU); - return; - } + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_FPU(ctx); - t1 = tcg_const_i64((uint64_t)RM(ctx->opcode)); + t1 = tcg_temp_new_i64(); + tcg_gen_movi_i64(t1, a->imm); - gen_helper_mffscrn(ctx, t1); + do_mffsc(a->rt, t1, FP_DRN | FP_ENABLES | FP_NI | FP_RN, ~FP_RN, 0x0001); tcg_temp_free_i64(t1); + + return true; } /* mtfsb0 */ diff --git a/target/ppc/translate/fp-ops.c.inc b/target/ppc/translate/fp-ops.c.inc index 46357a3c4c..81640553e1 100644 --- a/target/ppc/translate/fp-ops.c.inc +++ b/target/ppc/translate/fp-ops.c.inc @@ -75,10 +75,6 @@ GEN_HANDLER_E(fcpsgn, 0x3F, 0x08, 0x00, 0x00000000, PPC_NONE, PPC2_ISA205), GEN_HANDLER_E(fmrgew, 0x3F, 0x06, 0x1E, 0x00000001, PPC_NONE, PPC2_VSX207), GEN_HANDLER_E(fmrgow, 0x3F, 0x06, 0x1A, 0x00000001, PPC_NONE, PPC2_VSX207), GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT), -GEN_HANDLER_E_2(mffscrn, 0x3F, 0x07, 0x12, 0x16, 0x00000000, PPC_FLOAT, - PPC_NONE), -GEN_HANDLER_E_2(mffscrni, 0x3F, 0x07, 0x12, 0x17, 0x00000000, PPC_FLOAT, - PPC_NONE), GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT), GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT), GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x00000000, PPC_FLOAT), From patchwork Mon Apr 18 16:38:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618477 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KhtLQ5K4yz9sG6 for ; Tue, 19 Apr 2022 02:53:50 +1000 (AEST) Received: from localhost ([::1]:46380 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUdI-0007Mn-PI for incoming@patchwork.ozlabs.org; Mon, 18 Apr 2022 12:53:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38784) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ngUPg-00070m-St; Mon, 18 Apr 2022 12:39:44 -0400 Received: from [187.72.171.209] (port=20022 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUPf-0006A6-AT; Mon, 18 Apr 2022 12:39:44 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Mon, 18 Apr 2022 13:39:03 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id CA3A98000A0; Mon, 18 Apr 2022 13:39:02 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 06/10] target/ppc: Implement mffscdrn[i] instructions Date: Mon, 18 Apr 2022 13:38:19 -0300 Message-Id: <20220418163823.61866-7-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:03.0154 (UTC) FILETIME=[D016ED20:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 5 +++++ target/ppc/translate/fp-impl.c.inc | 35 ++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 177aa49878..e16fad2853 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -130,6 +130,9 @@ &X_imm2 rt imm @X_imm2 ...... rt:5 ..... ... imm:2 .......... . &X_imm2 +&X_imm3 rt imm +@X_imm3 ...... rt:5 ..... .. imm:3 .......... . &X_imm3 + %x_xt 0:1 21:5 &X_imm5 xt imm:uint8_t vrb @X_imm5 ...... ..... imm:5 vrb:5 .......... . &X_imm5 xt=%x_xt @@ -330,7 +333,9 @@ MFFS 111111 ..... 00000 ----- 1001000111 . @X_t_rc MFFSL 111111 ..... 11000 ----- 1001000111 - @X_t MFFSCE 111111 ..... 00001 ----- 1001000111 - @X_t MFFSCRN 111111 ..... 10110 ..... 1001000111 - @X_tb +MFFSCDRN 111111 ..... 10100 ..... 1001000111 - @X_tb MFFSCRNI 111111 ..... 10111 ---.. 1001000111 - @X_imm2 +MFFSCDRNI 111111 ..... 10101 --... 1001000111 - @X_imm3 ### Decimal Floating-Point Arithmetic Instructions diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index b294e286fb..32ddad49f5 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -679,6 +679,41 @@ static bool trans_MFFSCRNI(DisasContext *ctx, arg_X_imm2 *a) return true; } +static bool trans_MFFSCDRN(DisasContext *ctx, arg_X_tb *a) +{ + TCGv_i64 t1; + + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_FPU(ctx); + + t1 = tcg_temp_new_i64(); + get_fpr(t1, a->rb); + tcg_gen_andi_i64(t1, t1, FP_DRN); + + do_mffsc(a->rt, t1, FP_DRN | FP_ENABLES | FP_NI | FP_RN, ~FP_DRN, 0x0100); + + tcg_temp_free_i64(t1); + + return true; +} + +static bool trans_MFFSCDRNI(DisasContext *ctx, arg_X_imm3 *a) +{ + TCGv_i64 t1; + + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_FPU(ctx); + + t1 = tcg_temp_new_i64(); + tcg_gen_movi_i64(t1, (uint64_t)a->imm << FPSCR_DRN0); + + do_mffsc(a->rt, t1, FP_DRN | FP_ENABLES | FP_NI | FP_RN, ~FP_DRN, 0x0100); + + tcg_temp_free_i64(t1); + + return true; +} + /* mtfsb0 */ static void gen_mtfsb0(DisasContext *ctx) { From patchwork Mon Apr 18 16:38:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618445 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Kht6y5fJLz9sG6 for ; Tue, 19 Apr 2022 02:43:54 +1000 (AEST) Received: from localhost ([::1]:57884 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUTg-0004Ls-QE for incoming@patchwork.ozlabs.org; Mon, 18 Apr 2022 12:43:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38798) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ngUPj-00079H-Ks; Mon, 18 Apr 2022 12:39:47 -0400 Received: from [187.72.171.209] (port=20022 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUPh-0006A6-Qi; Mon, 18 Apr 2022 12:39:47 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Mon, 18 Apr 2022 13:39:03 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 1CEBF80060F; Mon, 18 Apr 2022 13:39:03 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 07/10] target/ppc: Add flag for ISA v2.06 BCDA instructions Date: Mon, 18 Apr 2022 13:38:20 -0300 Message-Id: <20220418163823.61866-8-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:03.0482 (UTC) FILETIME=[D048F9A0:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Adds an insns_flags2 for the BCD assist instructions introduced in Power ISA 2.06. These instructions are not listed in the manuals for e5500[1] and e6500[2], so the flag is only added for POWER7/8/9/10 models. [1] https://www.nxp.com/files-static/32bit/doc/ref_manual/EREF_RM.pdf [2] https://www.nxp.com/docs/en/reference-manual/E6500RM.pdf Signed-off-by: Matheus Ferst Signed-off-by: Víctor Colombo --- target/ppc/cpu.h | 4 +++- target/ppc/cpu_init.c | 9 +++++---- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 047b24ba50..6163d28c5a 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2284,6 +2284,8 @@ enum { PPC2_ISA300 = 0x0000000000080000ULL, /* POWER ISA 3.1 */ PPC2_ISA310 = 0x0000000000100000ULL, + /* ISA 2.06 BCD assist instructions */ + PPC2_BCDA_ISA206 = 0x0000000000200000ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \ @@ -2292,7 +2294,7 @@ enum { PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \ PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \ PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \ - PPC2_ISA300 | PPC2_ISA310) + PPC2_ISA300 | PPC2_ISA310 | PPC2_BCDA_ISA206) }; /*****************************************************************************/ diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 073fd10168..dd8486f614 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5984,7 +5984,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | PPC2_FP_CVT_S64 | - PPC2_PM_ISA206; + PPC2_PM_ISA206 | PPC2_BCDA_ISA206; pcc->msr_mask = (1ull << MSR_SF) | (1ull << MSR_VR) | (1ull << MSR_VSX) | @@ -6157,7 +6157,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | - PPC2_TM | PPC2_PM_ISA206; + PPC2_TM | PPC2_PM_ISA206 | PPC2_BCDA_ISA206; pcc->msr_mask = (1ull << MSR_SF) | (1ull << MSR_HV) | (1ull << MSR_TM) | @@ -6375,7 +6375,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | - PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL; + PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL | PPC2_BCDA_ISA206; pcc->msr_mask = (1ull << MSR_SF) | (1ull << MSR_HV) | (1ull << MSR_TM) | @@ -6588,7 +6588,8 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | - PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL | PPC2_ISA310; + PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL | PPC2_ISA310 | + PPC2_BCDA_ISA206; pcc->msr_mask = (1ull << MSR_SF) | (1ull << MSR_HV) | (1ull << MSR_TM) | From patchwork Mon Apr 18 16:38:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618447 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; 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Mon, 18 Apr 2022 13:39:03 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 61FD78000A0; Mon, 18 Apr 2022 13:39:03 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 08/10] target/ppc: implement addg6s Date: Mon, 18 Apr 2022 13:38:21 -0300 Message-Id: <20220418163823.61866-9-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:03.0686 (UTC) FILETIME=[D0681A60:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Implements the following Power ISA v2.06 instruction: addg6s: Add and Generate Sixes Signed-off-by: Matheus Ferst Signed-off-by: Víctor Colombo --- target/ppc/insn32.decode | 4 +++ target/ppc/translate/fixedpoint-impl.c.inc | 35 ++++++++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index e16fad2853..f7d7dd69ce 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -296,6 +296,10 @@ CNTTZDM 011111 ..... ..... ..... 1000111011 - @X PDEPD 011111 ..... ..... ..... 0010011100 - @X PEXTD 011111 ..... ..... ..... 0010111100 - @X +## BCD Assist + +ADDG6S 011111 ..... ..... ..... - 001001010 - @X + ### Float-Point Load Instructions LFS 110000 ..... ..... ................ @D diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 1aab32be03..62f5027b5b 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -492,3 +492,38 @@ static bool trans_PEXTD(DisasContext *ctx, arg_X *a) #endif return true; } + +static bool trans_ADDG6S(DisasContext *ctx, arg_X *a) +{ + const uint64_t nibbles = 0x0f0f0f0f0f0f0f0fULL, + carry_bits = 0x1010101010101010ULL; + TCGv t0, t1, t2; + + REQUIRE_INSNS_FLAGS2(ctx, BCDA_ISA206); + + t0 = tcg_temp_new(); + t1 = tcg_temp_new(); + t2 = tcg_temp_new(); + + tcg_gen_andi_tl(t0, cpu_gpr[a->ra], nibbles); + tcg_gen_andi_tl(t1, cpu_gpr[a->rb], nibbles); + tcg_gen_add_tl(t0, t0, t1); + tcg_gen_andi_tl(t0, t0, carry_bits); + tcg_gen_shri_tl(t0, t0, 4); + + tcg_gen_shri_tl(t1, cpu_gpr[a->ra], 4); + tcg_gen_shri_tl(t2, cpu_gpr[a->rb], 4); + tcg_gen_andi_tl(t1, t1, nibbles); + tcg_gen_andi_tl(t2, t2, nibbles); + tcg_gen_add_tl(t1, t1, t2); + tcg_gen_andi_tl(t1, t1, carry_bits); + + tcg_gen_or_tl(t0, t0, t1); + tcg_gen_muli_tl(cpu_gpr[a->rt], t0, 6); + + tcg_temp_free(t0); + tcg_temp_free(t1); + tcg_temp_free(t2); + + return true; +} From patchwork Mon Apr 18 16:38:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618458 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KhtFh1rxpz9sG6 for ; Tue, 19 Apr 2022 02:49:42 +1000 (AEST) Received: from localhost ([::1]:39984 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUZH-0002xe-Ow for incoming@patchwork.ozlabs.org; Mon, 18 Apr 2022 12:49:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39034) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ngUQs-0008Vj-R1; Mon, 18 Apr 2022 12:40:58 -0400 Received: from [187.72.171.209] (port=5022 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUQr-0006YK-1C; Mon, 18 Apr 2022 12:40:58 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Mon, 18 Apr 2022 13:39:03 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 9CAAF80060F; Mon, 18 Apr 2022 13:39:03 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 09/10] target/ppc: implement cbcdtd Date: Mon, 18 Apr 2022 13:38:22 -0300 Message-Id: <20220418163823.61866-10-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:03.0967 (UTC) FILETIME=[D092FAF0:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Implements the Convert Binary Coded Decimal To Declets instruction. Since libdecnumber doesn't expose the methods for direct conversion (decDigitsToDPD, BCD2DPD, etc.), the BCD values are converted to decimal32 format, from which the declets are extracted. Where the behavior is undefined, we try to match the result observed in a POWER9 DD2.3. Signed-off-by: Matheus Ferst Signed-off-by: Víctor Colombo --- target/ppc/dfp_helper.c | 39 ++++++++++++++++++++++ target/ppc/helper.h | 1 + target/ppc/insn32.decode | 4 +++ target/ppc/translate/fixedpoint-impl.c.inc | 7 ++++ 4 files changed, 51 insertions(+) diff --git a/target/ppc/dfp_helper.c b/target/ppc/dfp_helper.c index 0d01ac3de0..db9e994c8c 100644 --- a/target/ppc/dfp_helper.c +++ b/target/ppc/dfp_helper.c @@ -1391,3 +1391,42 @@ DFP_HELPER_SHIFT(DSCLI, 64, 1) DFP_HELPER_SHIFT(DSCLIQ, 128, 1) DFP_HELPER_SHIFT(DSCRI, 64, 0) DFP_HELPER_SHIFT(DSCRIQ, 128, 0) + +target_ulong helper_CBCDTD(target_ulong s) +{ + uint64_t res = 0; + uint32_t dec32; + uint8_t bcd[6]; + int w, i, offs; + decNumber a; + decContext context; + + decContextDefault(&context, DEC_INIT_DECIMAL32); + + for (w = 1; w >= 0; w--) { + res <<= 32; + decNumberZero(&a); + /* Extract each BCD field of word "w" */ + for (i = 5; i >= 0; i--) { + offs = 4 * (5 - i) + 32 * w; + bcd[i] = extract64(s, offs, 4); + if (bcd[i] > 9) { + /* + * If the field value is greater than 9, the results are + * undefined. We could use a fixed value like 0 or 9, but + * an and with 9 seems to better match the hardware behavior. + */ + bcd[i] &= 9; + } + } + + /* Create a decNumber with the BCD values and convert to decimal32 */ + decNumberSetBCD(&a, bcd, 6); + decimal32FromNumber((decimal32 *)&dec32, &a, &context); + + /* Extract the two declets from the decimal32 value */ + res |= dec32 & 0xfffff; + } + + return res; +} diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 57da11c77e..3fffd3f3ba 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -54,6 +54,7 @@ DEF_HELPER_3(sraw, tl, env, tl, tl) DEF_HELPER_FLAGS_2(CFUGED, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(PDEPD, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(PEXTD, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_1(CBCDTD, TCG_CALL_NO_RWG_SE, tl, tl) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl) DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index f7d7dd69ce..0f9dd3706a 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -84,6 +84,9 @@ &X_rc rt ra rb rc:bool @X_rc ...... rt:5 ra:5 rb:5 .......... rc:1 &X_rc +&X_sa rs ra +@X_sa ...... rs:5 ra:5 ..... .......... . &X_sa + %x_frtp 22:4 !function=times_2 %x_frap 17:4 !function=times_2 %x_frbp 12:4 !function=times_2 @@ -299,6 +302,7 @@ PEXTD 011111 ..... ..... ..... 0010111100 - @X ## BCD Assist ADDG6S 011111 ..... ..... ..... - 001001010 - @X +CBCDTD 011111 ..... ..... ----- 0100111010 - @X_sa ### Float-Point Load Instructions diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 62f5027b5b..d9174d2ba3 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -527,3 +527,10 @@ static bool trans_ADDG6S(DisasContext *ctx, arg_X *a) return true; } + +static bool trans_CBCDTD(DisasContext *ctx, arg_X_sa *a) +{ + REQUIRE_INSNS_FLAGS2(ctx, BCDA_ISA206); + gen_helper_CBCDTD(cpu_gpr[a->ra], cpu_gpr[a->rs]); + return true; +} From patchwork Mon Apr 18 16:38:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?V=C3=ADctor_Colombo?= X-Patchwork-Id: 1618453 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KhtDt2VFXz9sG6 for ; Tue, 19 Apr 2022 02:49:02 +1000 (AEST) Received: from localhost ([::1]:39182 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUYc-0002Pj-VB for incoming@patchwork.ozlabs.org; Mon, 18 Apr 2022 12:49:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39072) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ngUR2-0000Lt-I4; Mon, 18 Apr 2022 12:41:08 -0400 Received: from [187.72.171.209] (port=5022 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ngUQz-0006YK-8K; Mon, 18 Apr 2022 12:41:08 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Mon, 18 Apr 2022 13:39:04 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id E51518000A0; Mon, 18 Apr 2022 13:39:03 -0300 (-03) From: =?utf-8?q?V=C3=ADctor_Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH for-7.1 10/10] target/ppc: implement cdtbcd Date: Mon, 18 Apr 2022 13:38:23 -0300 Message-Id: <20220418163823.61866-11-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220418163823.61866-1-victor.colombo@eldorado.org.br> References: <20220418163823.61866-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 18 Apr 2022 16:39:04.0252 (UTC) FILETIME=[D0BE77C0:01D85342] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Implements the Convert Declets To Binary Coded Decimal instruction. Since libdecnumber doesn't expose the methods for direct conversion (decDigitsFromDPD, DPD2BCD, etc), a positive decimal32 with zero exponent is used as an intermediate value to convert the declets. Signed-off-by: Matheus Ferst Signed-off-by: Víctor Colombo --- target/ppc/dfp_helper.c | 26 ++++++++++++++++++++++ target/ppc/helper.h | 1 + target/ppc/insn32.decode | 1 + target/ppc/translate/fixedpoint-impl.c.inc | 7 ++++++ 4 files changed, 35 insertions(+) diff --git a/target/ppc/dfp_helper.c b/target/ppc/dfp_helper.c index db9e994c8c..5ba74b2124 100644 --- a/target/ppc/dfp_helper.c +++ b/target/ppc/dfp_helper.c @@ -1392,6 +1392,32 @@ DFP_HELPER_SHIFT(DSCLIQ, 128, 1) DFP_HELPER_SHIFT(DSCRI, 64, 0) DFP_HELPER_SHIFT(DSCRIQ, 128, 0) +target_ulong helper_CDTBCD(target_ulong s) +{ + uint64_t res = 0; + uint32_t dec32, declets; + uint8_t bcd[6]; + int i, w, sh; + decNumber a; + + for (w = 1; w >= 0; w--) { + res <<= 32; + declets = extract64(s, 32 * w, 20); + if (declets) { + /* decimal32 with zero exponent and word "w" declets */ + dec32 = (0x225ULL << 20) | declets; + decimal32ToNumber((decimal32 *)&dec32, &a); + decNumberGetBCD(&a, bcd); + for (i = 0; i < a.digits; i++) { + sh = 4 * (a.digits - 1 - i); + res |= (uint64_t)bcd[i] << sh; + } + } + } + + return res; +} + target_ulong helper_CBCDTD(target_ulong s) { uint64_t res = 0; diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 3fffd3f3ba..31252939c3 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -54,6 +54,7 @@ DEF_HELPER_3(sraw, tl, env, tl, tl) DEF_HELPER_FLAGS_2(CFUGED, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(PDEPD, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(PEXTD, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_1(CDTBCD, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_1(CBCDTD, TCG_CALL_NO_RWG_SE, tl, tl) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 0f9dd3706a..8f80fcaece 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -302,6 +302,7 @@ PEXTD 011111 ..... ..... ..... 0010111100 - @X ## BCD Assist ADDG6S 011111 ..... ..... ..... - 001001010 - @X +CDTBCD 011111 ..... ..... ----- 0100011010 - @X_sa CBCDTD 011111 ..... ..... ----- 0100111010 - @X_sa ### Float-Point Load Instructions diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index d9174d2ba3..9362c4bde8 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -528,6 +528,13 @@ static bool trans_ADDG6S(DisasContext *ctx, arg_X *a) return true; } +static bool trans_CDTBCD(DisasContext *ctx, arg_X_sa *a) +{ + REQUIRE_INSNS_FLAGS2(ctx, BCDA_ISA206); + gen_helper_CDTBCD(cpu_gpr[a->ra], cpu_gpr[a->rs]); + return true; +} + static bool trans_CBCDTD(DisasContext *ctx, arg_X_sa *a) { REQUIRE_INSNS_FLAGS2(ctx, BCDA_ISA206);