From patchwork Fri Aug 27 06:48:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenyi Qiang X-Patchwork-Id: 1521492 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GwqwN6p9Qz9sPf for ; Fri, 27 Aug 2021 16:45:23 +1000 (AEST) Received: from localhost ([::1]:45774 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mJVc7-0007ZP-O3 for incoming@patchwork.ozlabs.org; Fri, 27 Aug 2021 02:45:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47380) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mJVat-0007Wo-ND for qemu-devel@nongnu.org; Fri, 27 Aug 2021 02:44:03 -0400 Received: from mga12.intel.com ([192.55.52.136]:32025) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mJVao-0001h8-00 for qemu-devel@nongnu.org; Fri, 27 Aug 2021 02:44:01 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10088"; a="197471994" X-IronPort-AV: E=Sophos;i="5.84,355,1620716400"; d="scan'208";a="197471994" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2021 23:43:53 -0700 X-IronPort-AV: E=Sophos;i="5.84,355,1620716400"; d="scan'208";a="528205135" Received: from chenyi-pc.sh.intel.com ([10.239.159.88]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2021 23:43:52 -0700 From: Chenyi Qiang To: Eduardo Habkost , Paolo Bonzini , Richard Henderson Subject: [PATCH v2 1/2] target/i386: Remove split lock detect in Snowridge CPU model Date: Fri, 27 Aug 2021 14:48:17 +0800 Message-Id: <20210827064818.4698-2-chenyi.qiang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210827064818.4698-1-chenyi.qiang@intel.com> References: <20210827064818.4698-1-chenyi.qiang@intel.com> Received-SPF: pass client-ip=192.55.52.136; envelope-from=chenyi.qiang@intel.com; helo=mga12.intel.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Xiaoyao Li , Chenyi Qiang , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" At present, there's no mechanism intelligent enough to virtualize split lock detection correctly. Remove it in Snowridge CPU model to avoid the feature exposure. Signed-off-by: Chenyi Qiang Message-Id: <20210630012053.10098-1-chenyi.qiang@intel.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 34a7ce865b..aebf81d9c9 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3682,6 +3682,14 @@ static const X86CPUDefinition builtin_x86_defs[] = { { /* end of list */ }, }, }, + { + .version = 4, + .note = "no split lock detect", + .props = (PropValue[]) { + { "split-lock-detect", "off" }, + { /* end of list */ }, + }, + }, { /* end of list */ }, }, }, From patchwork Fri Aug 27 06:48:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenyi Qiang X-Patchwork-Id: 1521494 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GwqyX6k7Pz9sPf for ; Fri, 27 Aug 2021 16:47:16 +1000 (AEST) Received: from localhost ([::1]:51118 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mJVdy-0002qR-Ea for incoming@patchwork.ozlabs.org; Fri, 27 Aug 2021 02:47:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47384) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mJVav-0007Y9-63 for qemu-devel@nongnu.org; Fri, 27 Aug 2021 02:44:05 -0400 Received: from mga12.intel.com ([192.55.52.136]:32031) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mJVao-0001iM-13 for qemu-devel@nongnu.org; Fri, 27 Aug 2021 02:44:04 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10088"; a="197471999" X-IronPort-AV: E=Sophos;i="5.84,355,1620716400"; d="scan'208";a="197471999" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2021 23:43:55 -0700 X-IronPort-AV: E=Sophos;i="5.84,355,1620716400"; d="scan'208";a="528205141" Received: from chenyi-pc.sh.intel.com ([10.239.159.88]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2021 23:43:54 -0700 From: Chenyi Qiang To: Eduardo Habkost , Paolo Bonzini , Richard Henderson Subject: [PATCH v2 2/2] target/i386: Remove core-capability in Snowridge CPU model Date: Fri, 27 Aug 2021 14:48:18 +0800 Message-Id: <20210827064818.4698-3-chenyi.qiang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210827064818.4698-1-chenyi.qiang@intel.com> References: <20210827064818.4698-1-chenyi.qiang@intel.com> Received-SPF: pass client-ip=192.55.52.136; envelope-from=chenyi.qiang@intel.com; helo=mga12.intel.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Xiaoyao Li , Chenyi Qiang , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Because core-capability releated features are model-specific and KVM won't support it, remove the core-capability in CPU model to avoid the warning message. Signed-off-by: Chenyi Qiang --- target/i386/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index aebf81d9c9..86a15af1ed 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3684,9 +3684,10 @@ static const X86CPUDefinition builtin_x86_defs[] = { }, { .version = 4, - .note = "no split lock detect", + .note = "no split lock detect, no core-capability", .props = (PropValue[]) { { "split-lock-detect", "off" }, + { "core-capability", "off" }, { /* end of list */ }, }, },