From patchwork Sat Dec 12 17:54:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 1415462 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CtcRC0Dp6z9sPB for ; Sun, 13 Dec 2020 06:00:07 +1100 (AEDT) Received: from localhost ([::1]:53624 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1koA7g-0003lw-T1 for incoming@patchwork.ozlabs.org; Sat, 12 Dec 2020 14:00:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57358) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9U2-0000fo-Nz for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:06 -0500 Received: from mout.kundenserver.de ([212.227.126.134]:52471) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9Ty-00027N-MV for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:06 -0500 Received: from localhost.localdomain ([82.252.152.214]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPSA (Nemesis) id 1N5UoU-1k4lJP3iYc-0170Ry; Sat, 12 Dec 2020 18:55:02 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 1/5] hw/m68k/q800: Don't connect two qemu_irqs directly to the same input Date: Sat, 12 Dec 2020 18:54:54 +0100 Message-Id: <20201212175458.259960-2-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201212175458.259960-1-laurent@vivier.eu> References: <20201212175458.259960-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:I4fkby6ZmrgodSAXpPeZKvKTnWrpS2olwDJ2NsWWHZKHFt2veie lfaOiVVXP+sB426rbJNs8V/54Y4T20stGIrU4mVMu72FFNw3dqhdvvfgXYQu3mqbDjBxt6h wNNo00cblMmoVzsGU8/6YJVSHWwh69Z27d1Qxh7zAjDmw4aduFD9ZHrloaPCZnlEphZCImZ bcOcTH67HlwJ/rJgInkkw== X-UI-Out-Filterresults: notjunk:1;V03:K0:84uPdYbLF+E=:V4SNzK5jCfgZA3wtErnrk8 kyWcrYh5K0r11TdDnAz+ycUbOGUUnNoDx8QdURvX8/3v73Vqwc8Djh5PqJ/grxmRHoftdvQwr dJN2lZJ2m8+C4v0qfD5A2jeIj/b8JIijtY562oJYx5Fa8GF28PDZG4gMcmeAslSeuLATBhPUJ 7gkGwH6+5wfyi1LyK1cif0VCYkuy7wEI164BWZ/PLIXWCpPUCOOejOb08FMPm43WnZ9088DL9 ZfXDPtC08/dj7dAJDN1gPu9kBPStxXimyHLUbYhf4OqmwCCU4Ex+oDwQhcZkm6/9z1bipeOI+ UYuXpu0a66G0QvTr1/IqWkVpbsxX5FIiftPwMo3shwN4HgRatj2H7jOEkOuBSNddWoytdYxhj vOwHa5UUXKkFOkAYna0t2jA0FCn71pKiT8zUXKlYq28rFbEr7SmuG0HEyOXe4xY/eRQcCDqe6 vSH4ff3mSQ== Received-SPF: none client-ip=212.227.126.134; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The q800 board code connects both of the IRQ outputs of the ESCC to the same pic[3] qemu_irq. Connecting two qemu_irqs outputs directly to the same input is not valid as it produces subtly wrong behaviour (for instance if both the IRQ lines are high, and then one goes low, the PIC input will see this as a high-to-low transition even though the second IRQ line should still be holding it high). This kind of wiring needs an explicitly created OR gate; add one. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier Message-Id: <20201106235109.7066-2-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier --- hw/m68k/q800.c | 12 ++++++++++-- hw/m68k/Kconfig | 1 + 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 4db2b9bbc7b4..f9a2be776eb0 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -29,6 +29,7 @@ #include "hw/hw.h" #include "hw/boards.h" #include "hw/irq.h" +#include "hw/or-irq.h" #include "elf.h" #include "hw/loader.h" #include "ui/console.h" @@ -173,6 +174,7 @@ static void q800_init(MachineState *machine) CPUState *cs; DeviceState *dev; DeviceState *via_dev; + DeviceState *escc_orgate; SysBusESPState *sysbus_esp; ESPState *esp; SysBusDevice *sysbus; @@ -285,8 +287,14 @@ static void q800_init(MachineState *machine) qdev_prop_set_uint32(dev, "chnAtype", 0); sysbus = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(sysbus, &error_fatal); - sysbus_connect_irq(sysbus, 0, pic[3]); - sysbus_connect_irq(sysbus, 1, pic[3]); + + /* Logically OR both its IRQs together */ + escc_orgate = DEVICE(object_new(TYPE_OR_IRQ)); + object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal); + qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); + sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); + sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); + qdev_connect_gpio_out(DEVICE(escc_orgate), 0, pic[3]); sysbus_mmio_map(sysbus, 0, SCC_BASE); /* SCSI */ diff --git a/hw/m68k/Kconfig b/hw/m68k/Kconfig index c757e7dfa48b..60d7bcfb8f2b 100644 --- a/hw/m68k/Kconfig +++ b/hw/m68k/Kconfig @@ -22,3 +22,4 @@ config Q800 select ESCC select ESP select DP8393X + select OR_IRQ From patchwork Sat Dec 12 17:54:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 1415459 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CtcKj5bW2z9sT6 for ; Sun, 13 Dec 2020 05:55:21 +1100 (AEDT) Received: from localhost ([::1]:45692 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1koA35-0008W3-BW for incoming@patchwork.ozlabs.org; Sat, 12 Dec 2020 13:55:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57316) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9U1-0000eu-1H for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:05 -0500 Received: from mout.kundenserver.de ([212.227.126.133]:40507) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9Tw-000264-EK for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:04 -0500 Received: from localhost.localdomain ([82.252.152.214]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPSA (Nemesis) id 1MdNwm-1kF5L41evQ-00ZLRU; Sat, 12 Dec 2020 18:55:02 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 2/5] hw/m68k/q800.c: Make the GLUE chip an actual QOM device Date: Sat, 12 Dec 2020 18:54:55 +0100 Message-Id: <20201212175458.259960-3-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201212175458.259960-1-laurent@vivier.eu> References: <20201212175458.259960-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:5WvelqhmKeJZ1UJ33TMHa3b2gEKW8F8ymjEsQvDHOSYdYUL8jJF TknZWh5MFlDzEUd6FVUShawIL4Jxh3UHzmto+TTJ3eJoGMniJ2VUrGtRjjbK9luOdsK6IkE cLshecz51JrZ+a4yrilvT8n4nWyGoXesYSgAUL2sCUyX2QhTkjuR87Dt2+y5Yf7GfPH+8V8 1Q6XHtn9fcGBeffI4Hgog== X-UI-Out-Filterresults: notjunk:1;V03:K0:UwXOuLaZehw=:fhIiWcI41MGUNjEw+vEVkK kqlsTm0Za/J3sQmsEFFwlKAW0Ob+chGowbbBh/H9eqtv6LnOrvbeCo2Sc6kbZsmctXg1uy4yg qyQxrnEGmxNFlWLtA2B2zhYAhOWqCqHDWvZRVcS8Vujn613GeFGzabXPTaXB1jn+PG5cy1Tmp 85ZU9w0CyqykNh7/RPut7umVc1I02SVGJRnKCIvZfeIQVpTiq+TpTqvRzilq4dNVDLgqQdsJk 8MT6IvZcuVfA2otMB3Xb63DDHWqsbO6BrxxEAKSIagdrp9p69N4b/H/WAba1HjRwZngSsgt4m 8PtJlerqm0/5z8tOwa2qGFjZ0D0+7ex3xHdYeRwL1B9LTb6cOdvZzo8awS/sUShW8qqbdcQhG U5Gbz3mjdYrqXgrszsm8VpBK5Cj+zUHGGLOiBy5M8Oo2zJ0rElVoJHR82zrOHXARi9zm7uybd rEIXylpqYg== Received-SPF: none client-ip=212.227.126.133; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The handling of the GLUE (General Logic Unit) device is currently open-coded. Make this into a proper QOM device. This minor piece of modernisation gets rid of the free floating qemu_irq array 'pic', which Coverity points out is technically leaked when we exit the machine init function. (The replacement glue device is not leaked because it gets added to the sysbus, so it's accessible via that.) Fixes: Coverity CID 1421883 Signed-off-by: Peter Maydell Reviewed-by: Laurent vivier Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20201106235109.7066-3-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier --- hw/m68k/q800.c | 82 ++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 70 insertions(+), 12 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index f9a2be776eb0..2af0e2532eb2 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -48,6 +48,7 @@ #include "sysemu/qtest.h" #include "sysemu/runstate.h" #include "sysemu/reset.h" +#include "migration/vmstate.h" #define MACROM_ADDR 0x40800000 #define MACROM_SIZE 0x00100000 @@ -95,10 +96,14 @@ * CPU. */ -typedef struct { +#define TYPE_GLUE "q800-glue" +OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE) + +struct GLUEState { + SysBusDevice parent_obj; M68kCPU *cpu; uint8_t ipr; -} GLUEState; +}; static void GLUE_set_irq(void *opaque, int irq, int level) { @@ -120,6 +125,58 @@ static void GLUE_set_irq(void *opaque, int irq, int level) m68k_set_irq_level(s->cpu, 0, 0); } +static void glue_reset(DeviceState *dev) +{ + GLUEState *s = GLUE(dev); + + s->ipr = 0; +} + +static const VMStateDescription vmstate_glue = { + .name = "q800-glue", + .version_id = 0, + .minimum_version_id = 0, + .fields = (VMStateField[]) { + VMSTATE_UINT8(ipr, GLUEState), + VMSTATE_END_OF_LIST(), + }, +}; + +/* + * If the m68k CPU implemented its inbound irq lines as GPIO lines + * rather than via the m68k_set_irq_level() function we would not need + * this cpu link property and could instead provide outbound IRQ lines + * that the board could wire up to the CPU. + */ +static Property glue_properties[] = { + DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + +static void glue_init(Object *obj) +{ + DeviceState *dev = DEVICE(obj); + + qdev_init_gpio_in(dev, GLUE_set_irq, 8); +} + +static void glue_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->vmsd = &vmstate_glue; + dc->reset = glue_reset; + device_class_set_props(dc, glue_properties); +} + +static const TypeInfo glue_info = { + .name = TYPE_GLUE, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(GLUEState), + .instance_init = glue_init, + .class_init = glue_class_init, +}; + static void main_cpu_reset(void *opaque) { M68kCPU *cpu = opaque; @@ -180,8 +237,7 @@ static void q800_init(MachineState *machine) SysBusDevice *sysbus; BusState *adb_bus; NubusBus *nubus; - GLUEState *irq; - qemu_irq *pic; + DeviceState *glue; DriveInfo *dinfo; linux_boot = (kernel_filename != NULL); @@ -215,10 +271,9 @@ static void q800_init(MachineState *machine) } /* IRQ Glue */ - - irq = g_new0(GLUEState, 1); - irq->cpu = cpu; - pic = qemu_allocate_irqs(GLUE_set_irq, irq, 8); + glue = qdev_new(TYPE_GLUE); + object_property_set_link(OBJECT(glue), "cpu", OBJECT(cpu), &error_abort); + sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal); /* VIA */ @@ -230,8 +285,10 @@ static void q800_init(MachineState *machine) sysbus = SYS_BUS_DEVICE(via_dev); sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, VIA_BASE); - qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, pic[0]); - qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, pic[1]); + qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, + qdev_get_gpio_in(glue, 0)); + qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, + qdev_get_gpio_in(glue, 1)); adb_bus = qdev_get_child_bus(via_dev, "adb.0"); @@ -272,7 +329,7 @@ static void q800_init(MachineState *machine) sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, SONIC_BASE); sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); - sysbus_connect_irq(sysbus, 0, pic[2]); + sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2)); /* SCC */ @@ -294,7 +351,7 @@ static void q800_init(MachineState *machine) qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); - qdev_connect_gpio_out(DEVICE(escc_orgate), 0, pic[3]); + qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3)); sysbus_mmio_map(sysbus, 0, SCC_BASE); /* SCSI */ @@ -456,6 +513,7 @@ static const TypeInfo q800_machine_typeinfo = { static void q800_machine_register_types(void) { type_register_static(&q800_machine_typeinfo); + type_register_static(&glue_info); } type_init(q800_machine_register_types) From patchwork Sat Dec 12 17:54:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 1415463 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ctcc42vBSz9sR4 for ; Sun, 13 Dec 2020 06:07:46 +1100 (AEDT) Received: from localhost ([::1]:33780 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1koAF5-0007tk-8C for incoming@patchwork.ozlabs.org; Sat, 12 Dec 2020 14:07:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57410) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9U6-0000lB-Un for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:12 -0500 Received: from mout.kundenserver.de ([212.227.126.131]:43015) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9U4-00029t-Vf for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:10 -0500 Received: from localhost.localdomain ([82.252.152.214]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPSA (Nemesis) id 1Movrq-1kLCGW3pCY-00qRXG; Sat, 12 Dec 2020 18:55:03 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 3/5] target/m68k: remove useless qregs array Date: Sat, 12 Dec 2020 18:54:56 +0100 Message-Id: <20201212175458.259960-4-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201212175458.259960-1-laurent@vivier.eu> References: <20201212175458.259960-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:jw8Y8wEsow/FsjTlJFD11/GmhBDC8TvMOnKuS2/pFOnITKGctuq F12Mv38AbCnMws86mRz8taqc/FjbXGj7dSnw6368XHAvLugSaI1TrUBcrL+vaVMxRhSCmlL 2CcJEtOgG6b+86+g8ZxOUvjJKEqUuyWvoVtA2Zm30Kwi/51luTQoxIOl7p3gHq5MMv2Gbp7 CNwb46Y1mTrZlkpqN5XtQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:kp4Pd3k2Mr0=:hYrefMeLULHnpogM5SRnzp JmHpE1KJJKOMosknus/9kICoP4MBFEblHK+J6sazylYOdWPzHwBhDJgFrqoVsUEj6EmKgAkZB TjhIJBQoU99USQYyanyTKY7Uk4lzRphfr+spdb/LXBEaUEE45XyQEO+VS3F+L367UUWcHJhu8 cnKxMRRAlGvqQyB41VfSIOYtBI/84nFkyvYXIhiK5EkTRtKpt5h0nP44qjZeR6bhMFRiQ959O WvBvSZrfDGD1+IDp+gA1jsD/wV4dtaTmDBEbM/MDl2w21fDfoTK5MPDqMhV13TBt24jl07SUy C5/r9sO458lPWzVbutA9gyifnOkVrFn1oudjquTTcLKeY0lT3bHT7Rsf8L0IhjLeZBC0Nf3JK xd8RsLShpavvqJmDC8UUeOrTGMQldLDmxKqlGM3hp8gJLMB+uSANrGwtpsIym Received-SPF: none client-ip=212.227.126.131; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" They are unused since the target has been converted to TCG. Fixes: e1f3808e03f7 ("Convert m68k target to TCG.") Signed-off-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20201022203000.1922749-2-laurent@vivier.eu> --- target/m68k/cpu.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 521ac67cdd04..9a6f0400fcfe 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -33,8 +33,6 @@ #define OS_PACKED 6 #define OS_UNSIZED 7 -#define MAX_QREGS 32 - #define EXCP_ACCESS 2 /* Access (MMU) error. */ #define EXCP_ADDRESS 3 /* Address error. */ #define EXCP_ILLEGAL 4 /* Illegal instruction. */ @@ -139,8 +137,6 @@ typedef struct CPUM68KState { int pending_vector; int pending_level; - uint32_t qregs[MAX_QREGS]; - /* Fields up to this point are cleared by a CPU reset */ struct {} end_reset_fields; From patchwork Sat Dec 12 17:54:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 1415457 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Ctc6F4KxHz9sT6 for ; Sun, 13 Dec 2020 05:45:25 +1100 (AEDT) Received: from localhost ([::1]:46800 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ko9tT-0005A9-KW for incoming@patchwork.ozlabs.org; Sat, 12 Dec 2020 13:45:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57158) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9Tr-0000Vd-DQ for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:18:55 -0500 Received: from mout.kundenserver.de ([212.227.126.133]:39277) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9To-00023Z-M2 for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:18:55 -0500 Received: from localhost.localdomain ([82.252.152.214]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPSA (Nemesis) id 1My6xz-1juYZs1ANj-00zYCp; Sat, 12 Dec 2020 18:55:03 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 4/5] target/m68k: Add vmstate definition for M68kCPU Date: Sat, 12 Dec 2020 18:54:57 +0100 Message-Id: <20201212175458.259960-5-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201212175458.259960-1-laurent@vivier.eu> References: <20201212175458.259960-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:HrF8PlKqVXGueK0dRslluoWCRueBzoDGCfOpRcDodPajowpyMTX Zujg3zubD4hcLiiSCo75HbIlbRGsPL6YOdufgcwNgTwUs8Sl9BP8xewnzxxAzHUn2gcWwSx bu8wscr/Zwe7y7hS2gpy6XV2d+ithqOo3bQgy0S06xHkzFGAlTCmZYb0NHwUNTDVKA1oszy Q/WMnw5FVjgXDJUliGTSQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:sB71npsFM8g=:DaBp3/71rlA/rCL5uaEGDe yMy59W268cMfvcd61cAFfYZ1SuO5QakS/e1AQcW4GQ8xXb0dhPMRkS7fnLuTxl7OjuxosDWRQ 5b7bxWy8IJSvBs/WibTY4Q6gHlNdLkaqYuQWRHtIocx+MrTyTlmUIOy7xSlHA7SLJ2Z/78VPs OrMv7iATzjzeulE27TogC+2peReRJyGwYWXJguz5CurD8X/LFj6qYWcr6pW2w5c8WWGMJMrTL 7PLn4yay6ANUUy0RQiM5rdg0NAJpjeVBsEGaiChm5cwG7p9FF4yAkT7CkE8VM1Zf2vR7bwGZY 54PBgc6422frr+vnGeGSRK8lKtCb/3w12ZlsOkO0EGGPpquxlNERRm2qU+rufX9vzTGl6lEF8 S3aitcB/llNG0maQYc5KLLziAPHLe+iBUSufshRRqKMXiZufpTYSqWJ2JqNayg3QD8t5xZqYS VBwWL/pIVw== Received-SPF: none client-ip=212.227.126.133; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier Message-Id: <20201022203000.1922749-3-laurent@vivier.eu> --- target/m68k/cpu.h | 1 + target/m68k/cpu.c | 193 ++++++++++++++++++++++++++++++++++++++- target/m68k/fpu_helper.c | 10 +- 3 files changed, 198 insertions(+), 6 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 9a6f0400fcfe..de5b9875fea3 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -179,6 +179,7 @@ int cpu_m68k_signal_handler(int host_signum, void *pinfo, uint32_t cpu_m68k_get_ccr(CPUM68KState *env); void cpu_m68k_set_ccr(CPUM68KState *env, uint32_t); void cpu_m68k_set_sr(CPUM68KState *env, uint32_t); +void cpu_m68k_restore_fp_status(CPUM68KState *env); void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val); diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 72c545149e9b..b811a0bdde2d 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -260,10 +260,198 @@ static void m68k_cpu_initfn(Object *obj) cpu_set_cpustate_pointers(cpu); } +#if defined(CONFIG_SOFTMMU) +static bool fpu_needed(void *opaque) +{ + M68kCPU *s = opaque; + + return m68k_feature(&s->env, M68K_FEATURE_CF_FPU) || + m68k_feature(&s->env, M68K_FEATURE_FPU); +} + +typedef struct m68k_FPReg_tmp { + FPReg *parent; + uint64_t tmp_mant; + uint16_t tmp_exp; +} m68k_FPReg_tmp; + +static void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f) +{ + CPU_LDoubleU temp; + + temp.d = f; + *pmant = temp.l.lower; + *pexp = temp.l.upper; +} + +static floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper) +{ + CPU_LDoubleU temp; + + temp.l.upper = upper; + temp.l.lower = mant; + return temp.d; +} + +static int freg_pre_save(void *opaque) +{ + m68k_FPReg_tmp *tmp = opaque; + + cpu_get_fp80(&tmp->tmp_mant, &tmp->tmp_exp, tmp->parent->d); + + return 0; +} + +static int freg_post_load(void *opaque, int version) +{ + m68k_FPReg_tmp *tmp = opaque; + + tmp->parent->d = cpu_set_fp80(tmp->tmp_mant, tmp->tmp_exp); + + return 0; +} + +static const VMStateDescription vmstate_freg_tmp = { + .name = "freg_tmp", + .post_load = freg_post_load, + .pre_save = freg_pre_save, + .fields = (VMStateField[]) { + VMSTATE_UINT64(tmp_mant, m68k_FPReg_tmp), + VMSTATE_UINT16(tmp_exp, m68k_FPReg_tmp), + VMSTATE_END_OF_LIST() + } +}; + +static const VMStateDescription vmstate_freg = { + .name = "freg", + .fields = (VMStateField[]) { + VMSTATE_WITH_TMP(FPReg, m68k_FPReg_tmp, vmstate_freg_tmp), + VMSTATE_END_OF_LIST() + } +}; + +static int fpu_post_load(void *opaque, int version) +{ + M68kCPU *s = opaque; + + cpu_m68k_restore_fp_status(&s->env); + + return 0; +} + +const VMStateDescription vmmstate_fpu = { + .name = "cpu/fpu", + .version_id = 1, + .minimum_version_id = 1, + .needed = fpu_needed, + .post_load = fpu_post_load, + .fields = (VMStateField[]) { + VMSTATE_UINT32(env.fpcr, M68kCPU), + VMSTATE_UINT32(env.fpsr, M68kCPU), + VMSTATE_STRUCT_ARRAY(env.fregs, M68kCPU, 8, 0, vmstate_freg, FPReg), + VMSTATE_STRUCT(env.fp_result, M68kCPU, 0, vmstate_freg, FPReg), + VMSTATE_END_OF_LIST() + } +}; + +static bool cf_spregs_needed(void *opaque) +{ + M68kCPU *s = opaque; + + return m68k_feature(&s->env, M68K_FEATURE_CF_ISA_A); +} + +const VMStateDescription vmstate_cf_spregs = { + .name = "cpu/cf_spregs", + .version_id = 1, + .minimum_version_id = 1, + .needed = cf_spregs_needed, + .fields = (VMStateField[]) { + VMSTATE_UINT64_ARRAY(env.macc, M68kCPU, 4), + VMSTATE_UINT32(env.macsr, M68kCPU), + VMSTATE_UINT32(env.mac_mask, M68kCPU), + VMSTATE_UINT32(env.rambar0, M68kCPU), + VMSTATE_UINT32(env.mbar, M68kCPU), + VMSTATE_END_OF_LIST() + } +}; + +static bool cpu_68040_mmu_needed(void *opaque) +{ + M68kCPU *s = opaque; + + return m68k_feature(&s->env, M68K_FEATURE_M68040); +} + +const VMStateDescription vmstate_68040_mmu = { + .name = "cpu/68040_mmu", + .version_id = 1, + .minimum_version_id = 1, + .needed = cpu_68040_mmu_needed, + .fields = (VMStateField[]) { + VMSTATE_UINT32(env.mmu.ar, M68kCPU), + VMSTATE_UINT32(env.mmu.ssw, M68kCPU), + VMSTATE_UINT16(env.mmu.tcr, M68kCPU), + VMSTATE_UINT32(env.mmu.urp, M68kCPU), + VMSTATE_UINT32(env.mmu.srp, M68kCPU), + VMSTATE_BOOL(env.mmu.fault, M68kCPU), + VMSTATE_UINT32_ARRAY(env.mmu.ttr, M68kCPU, 4), + VMSTATE_UINT32(env.mmu.mmusr, M68kCPU), + VMSTATE_END_OF_LIST() + } +}; + +static bool cpu_68040_spregs_needed(void *opaque) +{ + M68kCPU *s = opaque; + + return m68k_feature(&s->env, M68K_FEATURE_M68040); +} + +const VMStateDescription vmstate_68040_spregs = { + .name = "cpu/68040_spregs", + .version_id = 1, + .minimum_version_id = 1, + .needed = cpu_68040_spregs_needed, + .fields = (VMStateField[]) { + VMSTATE_UINT32(env.vbr, M68kCPU), + VMSTATE_UINT32(env.cacr, M68kCPU), + VMSTATE_UINT32(env.sfc, M68kCPU), + VMSTATE_UINT32(env.dfc, M68kCPU), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_m68k_cpu = { .name = "cpu", - .unmigratable = 1, + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(env.dregs, M68kCPU, 8), + VMSTATE_UINT32_ARRAY(env.aregs, M68kCPU, 8), + VMSTATE_UINT32(env.pc, M68kCPU), + VMSTATE_UINT32(env.sr, M68kCPU), + VMSTATE_INT32(env.current_sp, M68kCPU), + VMSTATE_UINT32_ARRAY(env.sp, M68kCPU, 3), + VMSTATE_UINT32(env.cc_op, M68kCPU), + VMSTATE_UINT32(env.cc_x, M68kCPU), + VMSTATE_UINT32(env.cc_n, M68kCPU), + VMSTATE_UINT32(env.cc_v, M68kCPU), + VMSTATE_UINT32(env.cc_c, M68kCPU), + VMSTATE_UINT32(env.cc_z, M68kCPU), + VMSTATE_INT32(env.pending_vector, M68kCPU), + VMSTATE_INT32(env.pending_level, M68kCPU), + VMSTATE_END_OF_LIST() + }, + .subsections = (const VMStateDescription * []) { + &vmmstate_fpu, + &vmstate_cf_spregs, + &vmstate_68040_mmu, + &vmstate_68040_spregs, + NULL + }, }; +#endif static void m68k_cpu_class_init(ObjectClass *c, void *data) { @@ -287,13 +475,12 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) #if defined(CONFIG_SOFTMMU) cc->do_transaction_failed = m68k_cpu_transaction_failed; cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug; + dc->vmsd = &vmstate_m68k_cpu; #endif cc->disas_set_info = m68k_cpu_disas_set_info; cc->tcg_initialize = m68k_tcg_init; cc->gdb_num_core_regs = 18; - - dc->vmsd = &vmstate_m68k_cpu; } static void m68k_cpu_class_init_cf_core(ObjectClass *c, void *data) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 9acf60dfd443..797000e7482c 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -135,10 +135,8 @@ static void restore_rounding_mode(CPUM68KState *env) } } -void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val) +void cpu_m68k_restore_fp_status(CPUM68KState *env) { - env->fpcr = val & 0xffff; - if (m68k_feature(env, M68K_FEATURE_CF_FPU)) { cf_restore_precision_mode(env); } else { @@ -147,6 +145,12 @@ void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val) restore_rounding_mode(env); } +void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val) +{ + env->fpcr = val & 0xffff; + cpu_m68k_restore_fp_status(env); +} + void HELPER(fitrunc)(CPUM68KState *env, FPReg *res, FPReg *val) { FloatRoundMode rounding_mode = get_float_rounding_mode(&env->fp_status); From patchwork Sat Dec 12 17:54:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 1415458 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=vivier.eu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CtcBL4zbkz9sT6 for ; Sun, 13 Dec 2020 05:48:58 +1100 (AEDT) Received: from localhost ([::1]:56680 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ko9wu-00010E-Kz for incoming@patchwork.ozlabs.org; Sat, 12 Dec 2020 13:48:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57838) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9Ui-0001al-Uj for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:48 -0500 Received: from mout.kundenserver.de ([212.227.126.131]:51695) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ko9Uh-0002ON-4P for qemu-devel@nongnu.org; Sat, 12 Dec 2020 13:19:48 -0500 Received: from localhost.localdomain ([82.252.152.214]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPSA (Nemesis) id 1MyvFC-1jtihO2VIA-00vyty; Sat, 12 Dec 2020 18:55:04 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 5/5] m68k: fix some comment spelling errors Date: Sat, 12 Dec 2020 18:54:58 +0100 Message-Id: <20201212175458.259960-6-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201212175458.259960-1-laurent@vivier.eu> References: <20201212175458.259960-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:4xEk/o2/hRoQtBLpurBSFxNwfghpahVgGT9cl+V8HMTjNjB6fik ERwGSnrzK65sUwK92FmEEjaMyPDVGcf6dLcUFzK5KUKiw8J0IGIkuwZ2EpFcpg/0eCZ3pC3 mO6LQxMuPXsk+a76b31Lbd6W69Q4DmQA65lZ3Z6puAdx2L6hRbA/aOg3WnfDis+Mq/W/ndt 3MaNQ1drgdgwKLfTiL06g== X-UI-Out-Filterresults: notjunk:1;V03:K0:nhZpg6qpyUQ=:5syejOJOuzseCVSFuUgrNC lWdgGeLTmsqcWET0jpM9ICPMV0h85GF5U5s+oejxgb3xLL6b6ATU4E+ub3/FlX0UFKbjauF2D ZfEwQecxFkIIz4yCK1Mznth9TFlvKpYXuj6SrRNAEK0bDUYMcWo/NynUlUM6Q1+8fmcBam1LR BQGh0hvKpmZ7XRMMX+C6Pdj3TONdhD5FUxR91no9iZTCSUWFrvHCmvS+DnwAZ2s6fzFanxHrf zZsHjtZ7yK3pVhLws/phsfVvzIb2gkLzPtQQE6qLlx/u1el4i+MYaldwflfLtyq2DnSdLcBq1 trJTkha2gXCZ6FQRrN0Lwr7gFIgabYRX66O7mCBtMPJb8AsGgVCnoOhpq4l47rXAWOBcLBnCw 9XhAeu3gjHJAqjl9krpBQgH+6fnbfUHSE9g+mm0pypXSjYsdXBFVVXyzHE4cqOa8IcN2xl3GI pFlVD/Zc5A== Received-SPF: none client-ip=212.227.126.131; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Edmondson , zhaolichang , Laurent Vivier , Philippe Mathieu-Daude Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: zhaolichang I found that there are many spelling errors in the comments of qemu/target/m68k. I used spellcheck to check the spelling errors and found some errors in the folder. Signed-off-by: zhaolichang Reviewed-by: David Edmondson Reviewed-by: Philippe Mathieu-Daude Reviewed-by: Laurent Vivier Message-Id: <20201009064449.2336-9-zhaolichang@huawei.com> Signed-off-by: Laurent Vivier --- target/m68k/translate.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 3fc67aa45261..133a4049191e 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -438,7 +438,7 @@ static TCGv gen_addr_index(DisasContext *s, uint16_t ext, TCGv tmp) } /* - * Handle a base + index + displacement effective addresss. + * Handle a base + index + displacement effective address. * A NULL_QREG base means pc-relative. */ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base) @@ -1696,7 +1696,7 @@ static void bcd_add(TCGv dest, TCGv src) /* * t1 = (src + 0x066) + dest + X - * = result with some possible exceding 0x6 + * = result with some possible exceeding 0x6 */ t0 = tcg_const_i32(0x066); @@ -1706,7 +1706,7 @@ static void bcd_add(TCGv dest, TCGv src) tcg_gen_add_i32(t1, t0, dest); tcg_gen_add_i32(t1, t1, QREG_CC_X); - /* we will remove exceding 0x6 where there is no carry */ + /* we will remove exceeding 0x6 where there is no carry */ /* * t0 = (src + 0x0066) ^ dest @@ -1736,7 +1736,7 @@ static void bcd_add(TCGv dest, TCGv src) tcg_temp_free(t0); /* - * remove the exceding 0x6 + * remove the exceeding 0x6 * for digits that have not generated a carry */ @@ -2638,7 +2638,7 @@ DISAS_INSN(negx) gen_flush_flags(s); /* compute old Z */ /* - * Perform substract with borrow. + * Perform subtract with borrow. * (X, N) = -(src + X); */ @@ -2653,7 +2653,7 @@ DISAS_INSN(negx) /* * Compute signed-overflow for negation. The normal formula for * subtraction is (res ^ src) & (src ^ dest), but with dest==0 - * this simplies to res & src. + * this simplifies to res & src. */ tcg_gen_and_i32(QREG_CC_V, QREG_CC_N, src); @@ -3159,7 +3159,7 @@ static inline void gen_subx(DisasContext *s, TCGv src, TCGv dest, int opsize) gen_flush_flags(s); /* compute old Z */ /* - * Perform substract with borrow. + * Perform subtract with borrow. * (X, N) = dest - (src + X); */ @@ -3169,7 +3169,7 @@ static inline void gen_subx(DisasContext *s, TCGv src, TCGv dest, int opsize) gen_ext(QREG_CC_N, QREG_CC_N, opsize, 1); tcg_gen_andi_i32(QREG_CC_X, QREG_CC_X, 1); - /* Compute signed-overflow for substract. */ + /* Compute signed-overflow for subtract. */ tcg_gen_xor_i32(QREG_CC_V, QREG_CC_N, dest); tcg_gen_xor_i32(tmp, dest, src);