From patchwork Sat Jan 6 00:47:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jose Ricardo Ziviani X-Patchwork-Id: 856285 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zD2vs6H4sz9sNw for ; Sat, 6 Jan 2018 11:48:25 +1100 (AEDT) Received: from localhost ([::1]:38750 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eXcet-0000ZF-V8 for incoming@patchwork.ozlabs.org; Fri, 05 Jan 2018 19:48:23 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47860) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eXceA-0000W4-Ku for qemu-devel@nongnu.org; Fri, 05 Jan 2018 19:47:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eXce6-0002K2-Lp for qemu-devel@nongnu.org; Fri, 05 Jan 2018 19:47:38 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:37230) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eXce6-0002JP-BM for qemu-devel@nongnu.org; Fri, 05 Jan 2018 19:47:34 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w060i5dU142864 for ; Fri, 5 Jan 2018 19:47:33 -0500 Received: from e17.ny.us.ibm.com (e17.ny.us.ibm.com [129.33.205.207]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fahhkn48j-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Fri, 05 Jan 2018 19:47:32 -0500 Received: from localhost by e17.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 5 Jan 2018 19:47:30 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w060lTX5262438; Sat, 6 Jan 2018 00:47:29 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2E318AC040; Fri, 5 Jan 2018 19:48:40 -0500 (EST) Received: from pacoca.ibm.com (unknown [9.85.187.70]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 183AEAC043; Fri, 5 Jan 2018 19:48:38 -0500 (EST) From: Jose Ricardo Ziviani To: qemu-ppc@nongnu.org Date: Fri, 5 Jan 2018 22:47:22 -0200 X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180106004722.1152-1-joserz@linux.vnet.ibm.com> References: <20180106004722.1152-1-joserz@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18010600-0040-0000-0000-000003DC67D7 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008326; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000244; SDB=6.00970832; UDB=6.00491727; IPR=6.00750802; BA=6.00005765; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00018901; XFM=3.00000015; UTC=2018-01-06 00:47:31 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18010600-0041-0000-0000-000007D1BE63 Message-Id: <20180106004722.1152-2-joserz@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-01-05_11:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1801060006 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 1/1] spapr: Check SMT based on KVM_CAP_PPC_SMT_POSSIBLE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Power9 supports 4 HW threads/core but it's possible to emulate doorbells to implement virtual SMT. KVM has the KVM_CAP_PPC_SMT_POSSIBLE which returns a bitmap with all SMT modes supported by the host. Today, QEMU forces the SMT mode based on PVR compat table, this is silently done in spapr_fixup_cpu_dt. Then, if user passes thread=8 the guest will end up with 4 threads/core without any feedback to the user. It is confusing and will crash QEMU if a cpu is hotplugged in that guest. This patch makes use of KVM_CAP_PPC_SMT_POSSIBLE to check if the host supports the SMT mode so it allows Power9 guests to have 8 threads/core if desired. Reported-by: Satheesh Rajendran Signed-off-by: Jose Ricardo Ziviani --- hw/ppc/spapr.c | 14 +++++++++++++- hw/ppc/trace-events | 1 + target/ppc/kvm.c | 5 +++++ target/ppc/kvm_ppc.h | 6 ++++++ 4 files changed, 25 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index d1acfe8858..ea2503cd2f 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -345,7 +345,19 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr) PowerPCCPU *cpu = POWERPC_CPU(cs); DeviceClass *dc = DEVICE_GET_CLASS(cs); int index = spapr_vcpu_id(cpu); - int compat_smt = MIN(smp_threads, ppc_compat_max_threads(cpu)); + + /* set smt to maximum for this current pvr if the number + * passed is higher than defined by PVR compat mode AND + * if KVM cannot emulate it.*/ + int compat_smt = smp_threads; + if ((kvmppc_cap_smt_possible() & smp_threads) != smp_threads && + smp_threads > ppc_compat_max_threads(cpu)) { + compat_smt = ppc_compat_max_threads(cpu); + + trace_spapr_fixup_cpu_smt(index, smp_threads, + kvmppc_cap_smt_possible(), + ppc_compat_max_threads(cpu)); + } if ((index % smt) != 0) { continue; diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index b7c3e64b5e..a8e29d7ab1 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -16,6 +16,7 @@ spapr_irq_alloc(int irq) "irq %d" spapr_irq_alloc_block(int first, int num, bool lsi, int align) "first irq %d, %d irqs, lsi=%d, alignnum %d" spapr_irq_free(int src, int irq, int num) "Source#%d, first irq %d, %d irqs" spapr_irq_free_warn(int src, int irq) "Source#%d, irq %d is already free" +spapr_fixup_cpu_smt(int idx, int smpt, int kvmt, int pvrt) "CPU(%d): expected smt %d, kvm support %d, max smt pvr %d" # hw/ppc/spapr_hcall.c spapr_cas_pvr_try(uint32_t pvr) "0x%x" diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 518dd06e98..aac5667bf4 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2456,6 +2456,11 @@ bool kvmppc_has_cap_mmu_hash_v3(void) return cap_mmu_hash_v3; } +int kvmppc_cap_smt_possible(void) +{ + return cap_ppc_smt_possible; +} + PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) { uint32_t host_pvr = mfpvr(); diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index ecb55493cc..6ac33d2b4a 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -59,6 +59,7 @@ bool kvmppc_has_cap_fixup_hcalls(void); bool kvmppc_has_cap_htm(void); bool kvmppc_has_cap_mmu_radix(void); bool kvmppc_has_cap_mmu_hash_v3(void); +int kvmppc_cap_smt_possible(void); int kvmppc_enable_hwrng(void); int kvmppc_put_books_sregs(PowerPCCPU *cpu); PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); @@ -290,6 +291,11 @@ static inline bool kvmppc_has_cap_mmu_hash_v3(void) return false; } +static inline int kvmppc_cap_smt_possible(void) +{ + return -1; +} + static inline int kvmppc_enable_hwrng(void) { return -1;