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[SRU,N,1/1] EDAC/igen6: Add Intel Arrow Lake-U/H SoCs support

Message ID 20241002195300.25591-2-michael.reed@canonical.com
State New
Headers show
Series [SRU,N,1/1] EDAC/igen6: Add Intel Arrow Lake-U/H SoCs support | expand

Commit Message

Michael Reed Oct. 2, 2024, 7:53 p.m. UTC 
From: Qiuxu Zhuo <qiuxu.zhuo@intel.com>

BugLink: https://bugs.launchpad.net/bugs/2077861

Arrow Lake-U/H SoCs share same IBECC registers with Meteor Lake-P
SoCs. Add Arrow Lake-U/H SoC compute die IDs for EDAC support.

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20240614030354.69180-1-qiuxu.zhuo@intel.com
(cherry picked from commit 88150cd9501b9498e377cc4440325267c6921f90)
Signed-off-by: Michael Reed <Michael.Reed@canonical.com>
---
 drivers/edac/igen6_edac.c | 8 ++++++++
 1 file changed, 8 insertions(+)
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Patch

diff --git a/drivers/edac/igen6_edac.c b/drivers/edac/igen6_edac.c
index 9666caf2a6ab..0f73d4aa2298 100644
--- a/drivers/edac/igen6_edac.c
+++ b/drivers/edac/igen6_edac.c
@@ -257,6 +257,11 @@  static struct work_struct ecclog_work;
 #define DID_MTL_P_SKU2	0x7d02
 #define DID_MTL_P_SKU3	0x7d14
 
+/* Compute die IDs for Arrow Lake-UH with IBECC */
+#define DID_ARL_UH_SKU1	0x7d06
+#define DID_ARL_UH_SKU2	0x7d20
+#define DID_ARL_UH_SKU3	0x7d30
+
 static int get_mchbar(struct pci_dev *pdev, u64 *mchbar)
 {
 	union  {
@@ -595,6 +600,9 @@  static const struct pci_device_id igen6_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, DID_MTL_P_SKU1), (kernel_ulong_t)&mtl_p_cfg },
 	{ PCI_VDEVICE(INTEL, DID_MTL_P_SKU2), (kernel_ulong_t)&mtl_p_cfg },
 	{ PCI_VDEVICE(INTEL, DID_MTL_P_SKU3), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_ARL_UH_SKU1), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_ARL_UH_SKU2), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_ARL_UH_SKU3), (kernel_ulong_t)&mtl_p_cfg },
 	{ },
 };
 MODULE_DEVICE_TABLE(pci, igen6_pci_tbl);