diff mbox series

[SRU,N,1/1] x86/CPU/AMD: Add models 0x60-0x6f to the Zen5 range

Message ID 20240926182709.124249-2-vinicius.peixoto@canonical.com
State New
Headers show
Series Backport "x86/CPU/AMD: Add models 0x60-0x6f to the Zen5 range" | expand

Commit Message

Vinicius Peixoto Sept. 26, 2024, 6:27 p.m. UTC 
From: Perry Yuan <perry.yuan@amd.com>

BugLink: https://bugs.launchpad.net/bugs/2081863

Add some new Zen5 models for the 0x1A family.

  [ bp: Merge the 0x60 and 0x70 ranges. ]

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20240729064626.24297-1-bp@kernel.org
(cherry picked from commit bf5641eccf71bcd13a849930e190563c3a19815d)
Signed-off-by: Vinicius Peixoto <vinicius.peixoto@canonical.com>
---
 arch/x86/kernel/cpu/amd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index ca6096dcc5c6..809a66d522c1 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -575,7 +575,7 @@  static void bsp_init_amd(struct cpuinfo_x86 *c)
 		switch (c->x86_model) {
 		case 0x00 ... 0x2f:
 		case 0x40 ... 0x4f:
-		case 0x70 ... 0x7f:
+		case 0x60 ... 0x7f:
 			setup_force_cpu_cap(X86_FEATURE_ZEN5);
 			break;
 		default: