@@ -786,8 +786,19 @@ U_BOOT_DRIVER(eth_enetc_ls) = {
.plat_auto = sizeof(struct eth_pdata),
};
+static const struct enetc_data enetc_data_ls = {
+ .reg_offset_pmr = ENETC_PMR_OFFSET_LS,
+ .reg_offset_psipmar = ENETC_PSIPMARn_OFFSET_LS,
+ .reg_offset_pcapr = ENETC_PCAPR_OFFSET_LS,
+ .reg_offset_psicfgr = ENETC_PSICFGR_OFFSET_LS,
+ .reg_offset_mac = ENETC_PM_OFFSET_LS,
+};
+
static struct pci_device_id enetc_ids_ls[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_ETH) },
+ {
+ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_ETH),
+ .driver_data = (ulong)&enetc_data_ls,
+ },
{}
};
@@ -168,6 +168,15 @@ struct enetc_priv {
struct phy_device *phy;
};
+struct enetc_data {
+ /* Register layout offsets */
+ u16 reg_offset_pmr;
+ u16 reg_offset_psipmar;
+ u16 reg_offset_pcapr;
+ u16 reg_offset_psicfgr;
+ u16 reg_offset_mac;
+};
+
/* PCS / internal SoC PHY ID, it defaults to 0 on all interfaces */
#define ENETC_PCS_PHY_ADDR 0
Introduce driver data for each PCI device. The driver data carry offsets of registers which differ between different SoCs. Signed-off-by: Marek Vasut <marex@denx.de> --- Cc: Alice Guo <alice.guo@nxp.com> Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Jerome Forissier <jerome.forissier@linaro.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Markus Gothe <markus.gothe@genexis.eu> Cc: Peng Fan <peng.fan@nxp.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Robert Marko <robert.marko@sartura.hr> Cc: Romain Naour <romain.naour@smile.fr> Cc: Simon Glass <sjg@chromium.org> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Tom Rini <trini@konsulko.com> Cc: Ye Li <ye.li@nxp.com> Cc: u-boot@lists.denx.de --- drivers/net/fsl_enetc.c | 13 ++++++++++++- drivers/net/fsl_enetc.h | 9 +++++++++ 2 files changed, 21 insertions(+), 1 deletion(-)