| Message ID | 20241210042802.632688-3-venkatesh.abbarapu@amd.com |
|---|---|
| State | New |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show
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Mon, 9 Dec 2024 22:28:43 -0600 Received: from xhdvabbarap40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39 via Frontend Transport; Mon, 9 Dec 2024 22:28:39 -0600 From: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> To: <u-boot@lists.denx.de>, <tudor.ambarus@linaro.org> CC: <j-humphreys@ti.com>, <michal.simek@amd.com>, <jagan@amarulasolutions.com>, <vigneshr@ti.com>, <u-kumar1@ti.com>, <trini@konsulko.com>, <seanga2@gmail.com>, <caleb.connolly@linaro.org>, <sjg@chromium.org>, <william.zhang@broadcom.com>, <stefan_b@posteo.net>, <quentin.schulz@cherry.de>, <Takahiro.Kuwano@infineon.com>, <p-mantena@ti.com>, <git@amd.com>, Ashok Reddy Soma <ashok.reddy.soma@amd.com> Subject: [PATCH v3 2/2] mtd: spi-nor: Enable mt35xu512aba_fixups for all mt35xx flashes Date: Tue, 10 Dec 2024 09:58:02 +0530 Message-ID: <20241210042802.632688-3-venkatesh.abbarapu@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241210042802.632688-1-venkatesh.abbarapu@amd.com> References: <20241210042802.632688-1-venkatesh.abbarapu@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB05.amd.com: venkatesh.abbarapu@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F1:EE_|DS0PR12MB6485:EE_ X-MS-Office365-Filtering-Correlation-Id: 3423a893-8956-4777-09f7-08dd18d32267 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Enable mt35xu512aba_fixups for all mt35xx flashes
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expand
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diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ec841fb13bd..5d8ff6ff415 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -4404,8 +4404,12 @@ void spi_nor_set_fixups(struct spi_nor *nor) #endif #ifdef CONFIG_SPI_FLASH_MT35XU - if (!strcmp(nor->info->name, "mt35xu512aba")) + if (!strcmp(nor->info->name, "mt35xu512aba") || + !strcmp(nor->info->name, "mt35xl512aba") || + !strcmp(nor->info->name, "mt35xu01g") || + !strcmp(nor->info->name, "mt35xu02g")) { nor->fixups = &mt35xu512aba_fixups; + } #endif #if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX)