diff mbox series

[08/11] ddr: imx: Add new rates for i.MX91

Message ID 20241203-imx91-v1-8-48d2eaa4519e@nxp.com
State Accepted
Commit ffae5a2c7caf8861887a19d8e7c07a5175c2b57c
Delegated to: Fabio Estevam
Headers show
Series imx: add i.MX91 and 11x11-EVK support | expand

Commit Message

Peng Fan (OSS) Dec. 3, 2024, 3:42 p.m. UTC 
From: Ye Li <ye.li@nxp.com>

iMX91 reuses iMX93 controller and PHY, but with lower speed,
so add new DDR rates for i.MX91.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/ddr/imx/phy/ddrphy_utils.c | 8 ++++++++
 1 file changed, 8 insertions(+)
diff mbox series

Patch

diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c
index 14278f5ad8fce74156c03161e139975f9aa749d1..8e350de8315e40372f583c7a84c3ee5ed8b827d9 100644
--- a/drivers/ddr/imx/phy/ddrphy_utils.c
+++ b/drivers/ddr/imx/phy/ddrphy_utils.c
@@ -144,6 +144,10 @@  void ddrphy_init_set_dfi_clk(unsigned int drate)
 		dram_pll_init(MHZ(400));
 		dram_disable_bypass();
 		break;
+	case 1200:
+		dram_pll_init(MHZ(300));
+		dram_disable_bypass();
+		break;
 	case 1066:
 		dram_pll_init(MHZ(266));
 		dram_disable_bypass();
@@ -152,6 +156,10 @@  void ddrphy_init_set_dfi_clk(unsigned int drate)
 		dram_pll_init(MHZ(233));
 		dram_disable_bypass();
 		break;
+	case 800:
+		dram_pll_init(MHZ(200));
+		dram_disable_bypass();
+		break;
 	case 667:
 		dram_pll_init(MHZ(167));
 		dram_disable_bypass();