@@ -29,5 +29,6 @@ config SYS_COREBOOT
select BINMAN if X86_64
select SYSINFO
imply SYSINFO_EXTRA
+ select SERIAL_CAN_DISABLE
endif
@@ -95,6 +95,7 @@ static int read_dbg2(struct ns16550_plat *plat)
static int coreboot_of_to_plat(struct udevice *dev)
{
+ struct serial_dev_plat *uplat = dev_get_uclass_plat(dev);
struct ns16550_plat *plat = dev_get_plat(dev);
struct cb_serial *cb_info = lib_sysinfo.serial;
int ret = -ENOENT;
@@ -119,6 +120,7 @@ static int coreboot_of_to_plat(struct udevice *dev)
* there is no UART, which may panic. So stay silent and
* pray that the video console will work.
*/
+ uplat->disable = true;
log_debug("Cannot detect UART\n");
}
U-Boot normally requires a UART. When booting from coreboot it is sometimes just not available, e.g. when no sysinfo or DBG2 information is provided. In this case we need to continue running, since the display can be used. Use the 'disable' flag for this case. This allows U-Boot to start up and operation from the display, instead of hanging on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v3: - Put the feature behind a Kconfig - Move the feature to the serial uclass, so any serial driver can use it Changes in v2: - Drop RFC tag since there were no comments arch/x86/cpu/coreboot/Kconfig | 1 + drivers/serial/serial_coreboot.c | 2 ++ 2 files changed, 3 insertions(+)