Message ID | 20241119193626.2756-1-paul.barker.ct@bp.renesas.com |
---|---|
State | Accepted |
Commit | 9a699a0a0d62b326d04ac248578b6ce6f53be525 |
Delegated to: | Marek Vasut |
Headers | show |
Series | [v2] clk: rzg2l: Ignore enable for core clocks | expand |
On 11/19/24 8:36 PM, Paul Barker wrote: > In the RZ/G2L family, core clocks are always on and can't be disabled. > However, drivers which are shared with other SoCs may call clk_enable() > or clk_enable_bulk() for a clock referenced in the device tree which > happens to be a core clock on the RZ/G2L. To avoid the need for > conditionals in these drivers, simply ignore attempts to enable a core > clock. > > Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> > Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Applied to sh/master, thanks.
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index c8735d869cf9..3c5340df8eed 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -69,7 +69,15 @@ static int rzg2l_cpg_clk_set(struct clk *clk, bool enable) dev_dbg(clk->dev, "%s %s clock %u\n", enable ? "enable" : "disable", is_mod_clk(clk->id) ? "module" : "core", cpg_clk_id); + if (!is_mod_clk(clk->id)) { + /* + * Non-module clocks are always on. Ignore attempts to enable + * them and reject attempts to disable them. + */ + if (enable) + return 0; + dev_err(clk->dev, "ID %lu is not a module clock\n", clk->id); return -EINVAL; }