diff mbox series

[v3,1/3] rockchip: rk356x: Implement checkboard() to print SoC variant

Message ID 20241110005622.1515100-2-jonas@kwiboo.se
State New
Delegated to: Kever Yang
Headers show
Series rockchip: rk35xx: Implement checkboard() to print SoC variant | expand

Commit Message

Jonas Karlman Nov. 10, 2024, 12:56 a.m. UTC
Implement checkboard() to print current SoC model used by a board,
e.g. one of:

  SoC:   RK3566
  SoC:   RK3566T
  SoC:   RK3568
  SoC:   RK3568B2
  SoC:   RK3568J

when U-Boot proper is running.

  U-Boot 2025.01-rc1 (Nov 10 2024 - 00:39:37 +0000)

  Model: Generic RK3566/RK3568
  SoC:   RK3568J
  DRAM:  8 GiB (effective 7.7 GiB)

Information about the SoC model and variant is read from OTP.

Also update rk356x-u-boot.dtsi to include OTP in U-Boot pre-reloc phase,
where checkboard() is called.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
v3:
- Fix build issue with MISC=n or ROCKCHIP_OTP=n
- Remove use of cpu-version
- Use log_debug() instead of debug()
v2:
- Update commit message
- Update code comments
- Drop generic-rk3568_defconfig change
---
 arch/arm/dts/rk356x-u-boot.dtsi        |  4 ++
 arch/arm/mach-rockchip/rk3568/rk3568.c | 61 ++++++++++++++++++++++++++
 2 files changed, 65 insertions(+)

Comments

FUKAUMI Naoki Nov. 26, 2024, 5:23 a.m. UTC | #1
Hi,

On 11/10/24 09:56, Jonas Karlman wrote:
> Implement checkboard() to print current SoC model used by a board,
> e.g. one of:
> 
>    SoC:   RK3566
>    SoC:   RK3566T
>    SoC:   RK3568
>    SoC:   RK3568B2
>    SoC:   RK3568J
> 
> when U-Boot proper is running.
> 
>    U-Boot 2025.01-rc1 (Nov 10 2024 - 00:39:37 +0000)
> 
>    Model: Generic RK3566/RK3568
>    SoC:   RK3568J
>    DRAM:  8 GiB (effective 7.7 GiB)
> 
> Information about the SoC model and variant is read from OTP.
> 
> Also update rk356x-u-boot.dtsi to include OTP in U-Boot pre-reloc phase,
> where checkboard() is called.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Tested-by: FUKAUMI Naoki <naoki@radxa.com>

SoC:   RK3566
SoC:   RK3566T
SoC:   RK3568
SoC:   RK3568J

Best regards,

--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.

> ---
> v3:
> - Fix build issue with MISC=n or ROCKCHIP_OTP=n
> - Remove use of cpu-version
> - Use log_debug() instead of debug()
> v2:
> - Update commit message
> - Update code comments
> - Drop generic-rk3568_defconfig change
> ---
>   arch/arm/dts/rk356x-u-boot.dtsi        |  4 ++
>   arch/arm/mach-rockchip/rk3568/rk3568.c | 61 ++++++++++++++++++++++++++
>   2 files changed, 65 insertions(+)
> 
> diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
> index 0a0943b462a9..24a976cf7e21 100644
> --- a/arch/arm/dts/rk356x-u-boot.dtsi
> +++ b/arch/arm/dts/rk356x-u-boot.dtsi
> @@ -87,6 +87,10 @@
>   	bootph-all;
>   };
>   
> +&otp {
> +	bootph-some-ram;
> +};
> +
>   &pcfg_pull_none {
>   	bootph-all;
>   };
> diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
> index c9a32287e924..c2b96902d2dd 100644
> --- a/arch/arm/mach-rockchip/rk3568/rk3568.c
> +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
> @@ -3,7 +3,10 @@
>    * (C) Copyright 2021 Rockchip Electronics Co., Ltd
>    */
>   
> +#define LOG_CATEGORY LOGC_ARCH
> +
>   #include <dm.h>
> +#include <misc.h>
>   #include <asm/armv8/mmu.h>
>   #include <asm/arch-rockchip/bootrom.h>
>   #include <asm/arch-rockchip/grf_rk3568.h>
> @@ -139,3 +142,61 @@ int arch_cpu_init(void)
>   #endif
>   	return 0;
>   }
> +
> +#define RK3568_OTP_CPU_CODE_OFFSET		0x02
> +#define RK3568_OTP_SPECIFICATION_OFFSET		0x07
> +#define RK3568_OTP_PERFORMANCE_OFFSET		0x22
> +
> +int checkboard(void)
> +{
> +	u8 cpu_code[2], specification, package, performance;
> +	struct udevice *dev;
> +	char suffix[3];
> +	int ret;
> +
> +	if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC))
> +		return 0;
> +
> +	ret = uclass_get_device_by_driver(UCLASS_MISC,
> +					  DM_DRIVER_GET(rockchip_otp), &dev);
> +	if (ret) {
> +		log_debug("Could not find otp device, ret=%d\n", ret);
> +		return 0;
> +	}
> +
> +	/* cpu-code: SoC model, e.g. 0x35 0x66 or 0x35 0x68 */
> +	ret = misc_read(dev, RK3568_OTP_CPU_CODE_OFFSET, cpu_code, 2);
> +	if (ret < 0) {
> +		log_debug("Could not read cpu-code, ret=%d\n", ret);
> +		return 0;
> +	}
> +
> +	/* specification: SoC variant, e.g. 0x2 for RK3568B2 and 0xA for RK3568J */
> +	ret = misc_read(dev, RK3568_OTP_SPECIFICATION_OFFSET, &specification, 1);
> +	if (ret < 0) {
> +		log_debug("Could not read specification, ret=%d\n", ret);
> +		return 0;
> +	}
> +	/* package: likely SoC variant revision, 0x2 for RK3568B2 */
> +	package = specification >> 5;
> +	specification &= 0x1f;
> +
> +	/* performance: used to identify RK3566T SoC variant */
> +	ret = misc_read(dev, RK3568_OTP_PERFORMANCE_OFFSET, &performance, 1);
> +	if (ret < 0) {
> +		log_debug("Could not read performance, ret=%d\n", ret);
> +		return 0;
> +	}
> +	if (performance & 0x0f)
> +		specification = 0x14; /* T-variant */
> +
> +	/* for RK3568J i.e. '@' + 0xA = 'J' */
> +	suffix[0] = specification > 1 ? '@' + specification : '\0';
> +	/* for RK3568B2 i.e. '0' + 0x2 = '2' */
> +	suffix[1] = package > 1 ? '0' + package : '\0';
> +	suffix[2] = '\0';
> +
> +	printf("SoC:   RK%02x%02x%s\n", cpu_code[0], cpu_code[1], suffix);
> +
> +	return 0;
> +}
diff mbox series

Patch

diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index 0a0943b462a9..24a976cf7e21 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -87,6 +87,10 @@ 
 	bootph-all;
 };
 
+&otp {
+	bootph-some-ram;
+};
+
 &pcfg_pull_none {
 	bootph-all;
 };
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index c9a32287e924..c2b96902d2dd 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -3,7 +3,10 @@ 
  * (C) Copyright 2021 Rockchip Electronics Co., Ltd
  */
 
+#define LOG_CATEGORY LOGC_ARCH
+
 #include <dm.h>
+#include <misc.h>
 #include <asm/armv8/mmu.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/grf_rk3568.h>
@@ -139,3 +142,61 @@  int arch_cpu_init(void)
 #endif
 	return 0;
 }
+
+#define RK3568_OTP_CPU_CODE_OFFSET		0x02
+#define RK3568_OTP_SPECIFICATION_OFFSET		0x07
+#define RK3568_OTP_PERFORMANCE_OFFSET		0x22
+
+int checkboard(void)
+{
+	u8 cpu_code[2], specification, package, performance;
+	struct udevice *dev;
+	char suffix[3];
+	int ret;
+
+	if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC))
+		return 0;
+
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_DRIVER_GET(rockchip_otp), &dev);
+	if (ret) {
+		log_debug("Could not find otp device, ret=%d\n", ret);
+		return 0;
+	}
+
+	/* cpu-code: SoC model, e.g. 0x35 0x66 or 0x35 0x68 */
+	ret = misc_read(dev, RK3568_OTP_CPU_CODE_OFFSET, cpu_code, 2);
+	if (ret < 0) {
+		log_debug("Could not read cpu-code, ret=%d\n", ret);
+		return 0;
+	}
+
+	/* specification: SoC variant, e.g. 0x2 for RK3568B2 and 0xA for RK3568J */
+	ret = misc_read(dev, RK3568_OTP_SPECIFICATION_OFFSET, &specification, 1);
+	if (ret < 0) {
+		log_debug("Could not read specification, ret=%d\n", ret);
+		return 0;
+	}
+	/* package: likely SoC variant revision, 0x2 for RK3568B2 */
+	package = specification >> 5;
+	specification &= 0x1f;
+
+	/* performance: used to identify RK3566T SoC variant */
+	ret = misc_read(dev, RK3568_OTP_PERFORMANCE_OFFSET, &performance, 1);
+	if (ret < 0) {
+		log_debug("Could not read performance, ret=%d\n", ret);
+		return 0;
+	}
+	if (performance & 0x0f)
+		specification = 0x14; /* T-variant */
+
+	/* for RK3568J i.e. '@' + 0xA = 'J' */
+	suffix[0] = specification > 1 ? '@' + specification : '\0';
+	/* for RK3568B2 i.e. '0' + 0x2 = '2' */
+	suffix[1] = package > 1 ? '0' + package : '\0';
+	suffix[2] = '\0';
+
+	printf("SoC:   RK%02x%02x%s\n", cpu_code[0], cpu_code[1], suffix);
+
+	return 0;
+}