@@ -791,9 +791,9 @@ static void set_ds_odt(const struct chan_info *chan,
phy_io_config(denali_phy, denali_ctl, params, mr5);
}
-static void pctl_start(struct dram_info *dram,
- struct rk3399_sdram_params *params,
- u32 channel_mask)
+static int pctl_start(struct dram_info *dram,
+ struct rk3399_sdram_params *params,
+ u32 channel_mask)
{
const struct chan_info *chan_0 = &dram->chan[0];
const struct chan_info *chan_1 = &dram->chan[1];
@@ -892,6 +892,8 @@ static void pctl_start(struct dram_info *dram,
params->phy_regs.denali_phy[937] &
0xFF);
}
+
+ return 0;
}
static int pctl_cfg(struct dram_info *dram, const struct chan_info *chan,
@@ -2940,7 +2942,8 @@ static int sdram_init(struct dram_info *dram,
}
/* start to trigger initialization */
- pctl_start(dram, params, 3);
+ if (pctl_start(dram, params, 3))
+ return -EINVAL;
/* LPDDR2/LPDDR3 need to wait DAI complete, max 10us */
if (dramtype == LPDDR3)