| Message ID | 20240920070242.20884-13-tien.fong.chee@intel.com |
|---|---|
| State | Changes Requested |
| Delegated to: | TIEN FONG CHEE |
| Headers | show |
| Series | SoCFPGA: Add Boot Support for Agilex 5 in U-Boot | expand |
On 9/20/24 9:02 AM, tien.fong.chee@intel.com wrote: > From: Tien Fong Chee <tien.fong.chee@intel.com> > > Update the print info per Agilex 5. > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> > --- > arch/arm/mach-socfpga/misc_soc64.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-socfpga/misc_soc64.c b/arch/arm/mach-socfpga/misc_soc64.c > index a6cc78454da..95e1c07e39f 100644 > --- a/arch/arm/mach-socfpga/misc_soc64.c > +++ b/arch/arm/mach-socfpga/misc_soc64.c > @@ -45,7 +45,12 @@ static Altera_desc altera_fpga[] = { > #if defined(CONFIG_DISPLAY_CPUINFO) > int print_cpuinfo(void) > { > - puts("CPU: Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex-A53)\n"); > + if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)) { > + puts("CPU: Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex-A55/A76)"); > + puts("\n"); > + } else { > + printf("CPU: Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex-%s)\n", IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5) ? "A55/A76" : "A53");
Hi, > -----Original Message----- > From: Marek Vasut <marex@denx.de> > Sent: Saturday, September 21, 2024 9:53 PM > To: Chee, Tien Fong <tien.fong.chee@intel.com>; u-boot@lists.denx.de > Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>; Meng, Tingting > <tingting.meng@intel.com>; Yuslaimi, Alif Zakuan > <alif.zakuan.yuslaimi@intel.com>; Hea, Kok Kiang > <kok.kiang.hea@intel.com> > Subject: Re: [PATCH v1 12/20] arm: socfpga: agilex5: Update CPU info > > On 9/20/24 9:02 AM, tien.fong.chee@intel.com wrote: > > From: Tien Fong Chee <tien.fong.chee@intel.com> > > > > Update the print info per Agilex 5. > > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> > > --- > > arch/arm/mach-socfpga/misc_soc64.c | 7 ++++++- > > 1 file changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm/mach-socfpga/misc_soc64.c b/arch/arm/mach- > socfpga/misc_soc64.c > > index a6cc78454da..95e1c07e39f 100644 > > --- a/arch/arm/mach-socfpga/misc_soc64.c > > +++ b/arch/arm/mach-socfpga/misc_soc64.c > > @@ -45,7 +45,12 @@ static Altera_desc altera_fpga[] = { > > #if defined(CONFIG_DISPLAY_CPUINFO) > > int print_cpuinfo(void) > > { > > - puts("CPU: Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex- > A53)\n"); > > + if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)) { > > + puts("CPU: Intel FPGA SoCFPGA Platform (ARMv8 64bit > Cortex-A55/A76)"); > > + puts("\n"); > > + } else { > > + > > printf("CPU: Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex-%s)\n", > IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5) ? "A55/A76" : "A53"); We will fix it. Thanks for the good comment. Regards, Tien Fong
diff --git a/arch/arm/mach-socfpga/misc_soc64.c b/arch/arm/mach-socfpga/misc_soc64.c index a6cc78454da..95e1c07e39f 100644 --- a/arch/arm/mach-socfpga/misc_soc64.c +++ b/arch/arm/mach-socfpga/misc_soc64.c @@ -45,7 +45,12 @@ static Altera_desc altera_fpga[] = { #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo(void) { - puts("CPU: Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex-A53)\n"); + if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)) { + puts("CPU: Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex-A55/A76)"); + puts("\n"); + } else { + puts("CPU: Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex-A53)\n"); + } return 0; }