diff mbox series

[v3,11/12] MIPS: boston: Migrate to OF_UPSTREAM

Message ID 20240517-boston-v3-11-1ea7d23f4a1d@flygoat.com
State New
Delegated to: Daniel Schwierzeck
Headers show
Series MIPS: Boston: Various enhancements | expand

Commit Message

Jiaxun Yang May 17, 2024, 6:14 p.m. UTC 
We can now boot with upstream devicetree.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/Kconfig                |   1 +
 arch/mips/dts/Makefile           |   1 -
 arch/mips/dts/boston-u-boot.dtsi |  10 ++
 arch/mips/dts/img,boston.dts     | 222 ---------------------------------------
 board/imgtec/boston/MAINTAINERS  |   1 +
 configs/boston32r2_defconfig     |   2 +-
 configs/boston32r2el_defconfig   |   2 +-
 configs/boston32r6_defconfig     |   2 +-
 configs/boston32r6el_defconfig   |   2 +-
 configs/boston64r2_defconfig     |   2 +-
 configs/boston64r2el_defconfig   |   2 +-
 configs/boston64r6_defconfig     |   2 +-
 configs/boston64r6el_defconfig   |   2 +-
 13 files changed, 20 insertions(+), 231 deletions(-)

Comments

Daniel Schwierzeck May 19, 2024, 6:20 p.m. UTC | #1 
On 5/17/24 20:14, Jiaxun Yang wrote:
> We can now boot with upstream devicetree.
> 
> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>   arch/mips/Kconfig                |   1 +
>   arch/mips/dts/Makefile           |   1 -
>   arch/mips/dts/boston-u-boot.dtsi |  10 ++
>   arch/mips/dts/img,boston.dts     | 222 ---------------------------------------
>   board/imgtec/boston/MAINTAINERS  |   1 +
>   configs/boston32r2_defconfig     |   2 +-
>   configs/boston32r2el_defconfig   |   2 +-
>   configs/boston32r6_defconfig     |   2 +-
>   configs/boston32r6el_defconfig   |   2 +-
>   configs/boston64r2_defconfig     |   2 +-
>   configs/boston64r2el_defconfig   |   2 +-
>   configs/boston64r6_defconfig     |   2 +-
>   configs/boston64r6el_defconfig   |   2 +-
>   13 files changed, 20 insertions(+), 231 deletions(-)
> 

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 748b5175b2eb..733a8de4fb83 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -146,6 +146,7 @@ config TARGET_BOSTON
>   	select SUPPORTS_CPU_MIPS64_R2
>   	select SUPPORTS_CPU_MIPS64_R6
>   	select SUPPORTS_LITTLE_ENDIAN
> +	imply OF_UPSTREAM

should be 'select' because the switch to upstream DTS is permanent and 
it does not make sense for the user to be able to deselect this option

>   	imply BOOTSTD_FULL
>   	imply CLK
>   	imply CLK_BOSTON
> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
> index 14fbce597b9e..5478dcd8d025 100644
> --- a/arch/mips/dts/Makefile
> +++ b/arch/mips/dts/Makefile
> @@ -3,7 +3,6 @@
>   dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
>   dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
>   dtb-$(CONFIG_TARGET_AP152) += ap152.dtb
> -dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
>   dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
>   dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
>   dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
> diff --git a/arch/mips/dts/boston-u-boot.dtsi b/arch/mips/dts/boston-u-boot.dtsi
> new file mode 100644
> index 000000000000..1b0c0a289613
> --- /dev/null
> +++ b/arch/mips/dts/boston-u-boot.dtsi
> @@ -0,0 +1,10 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +
> +&plat_regs {
> +	compatible = "img,boston-platform-regs", "syscon", "simple-mfd";
> +	bootph-all;
> +};
> +
> +&clk_boston {
> +	bootph-all;
> +};
> diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts
> deleted file mode 100644
> index c1a73963037d..000000000000
> --- a/arch/mips/dts/img,boston.dts
> +++ /dev/null
> @@ -1,222 +0,0 @@
> -/dts-v1/;
> -
> -#include <dt-bindings/clock/boston-clock.h>
> -#include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/interrupt-controller/irq.h>
> -#include <dt-bindings/interrupt-controller/mips-gic.h>
> -
> -/ {
> -	#address-cells = <1>;
> -	#size-cells = <1>;
> -	compatible = "img,boston";
> -
> -	chosen {
> -		stdout-path = &uart0;
> -	};
> -
> -	cpus {
> -		#address-cells = <1>;
> -		#size-cells = <0>;
> -
> -		cpu@0 {
> -			device_type = "cpu";
> -			compatible = "img,mips";
> -			reg = <0>;
> -			clocks = <&clk_boston BOSTON_CLK_CPU>;
> -		};
> -	};
> -
> -	memory@0 {
> -		device_type = "memory";
> -		reg = <0x00000000 0x10000000>;
> -	};
> -
> -	gic: interrupt-controller {
> -		compatible = "mti,gic";
> -
> -		interrupt-controller;
> -		#interrupt-cells = <3>;
> -
> -		timer {
> -			compatible = "mti,gic-timer";
> -			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
> -			clocks = <&clk_boston BOSTON_CLK_CPU>;
> -		};
> -	};
> -
> -	pci0: pci@10000000 {
> -		status = "disabled";
> -		compatible = "xlnx,axi-pcie-host-1.00.a";
> -		device_type = "pci";
> -		reg = <0x10000000 0x2000000>;
> -
> -		#address-cells = <3>;
> -		#size-cells = <2>;
> -		#interrupt-cells = <1>;
> -
> -		interrupt-parent = <&gic>;
> -		interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
> -
> -		ranges = <0x02000000 0 0x40000000
> -			  0x40000000 0 0x40000000>;
> -
> -		interrupt-map-mask = <0 0 0 7>;
> -		interrupt-map = <0 0 0 1 &pci0_intc 0>,
> -				<0 0 0 2 &pci0_intc 1>,
> -				<0 0 0 3 &pci0_intc 2>,
> -				<0 0 0 4 &pci0_intc 3>;
> -
> -		pci0_intc: interrupt-controller {
> -			interrupt-controller;
> -			#address-cells = <0>;
> -			#interrupt-cells = <1>;
> -		};
> -	};
> -
> -	pci1: pci@12000000 {
> -		status = "disabled";
> -		compatible = "xlnx,axi-pcie-host-1.00.a";
> -		device_type = "pci";
> -		reg = <0x12000000 0x2000000>;
> -
> -		#address-cells = <3>;
> -		#size-cells = <2>;
> -		#interrupt-cells = <1>;
> -
> -		interrupt-parent = <&gic>;
> -		interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
> -
> -		ranges = <0x02000000 0 0x20000000
> -			  0x20000000 0 0x20000000>;
> -
> -		interrupt-map-mask = <0 0 0 7>;
> -		interrupt-map = <0 0 0 1 &pci1_intc 0>,
> -				<0 0 0 2 &pci1_intc 1>,
> -				<0 0 0 3 &pci1_intc 2>,
> -				<0 0 0 4 &pci1_intc 3>;
> -
> -		pci1_intc: interrupt-controller {
> -			interrupt-controller;
> -			#address-cells = <0>;
> -			#interrupt-cells = <1>;
> -		};
> -	};
> -
> -	pci2: pci@14000000 {
> -		compatible = "xlnx,axi-pcie-host-1.00.a";
> -		device_type = "pci";
> -		reg = <0x14000000 0x2000000>;
> -
> -		#address-cells = <3>;
> -		#size-cells = <2>;
> -		#interrupt-cells = <1>;
> -
> -		interrupt-parent = <&gic>;
> -		interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
> -
> -		ranges = <0x02000000 0 0x16000000
> -			  0x16000000 0 0x100000>;
> -
> -		interrupt-map-mask = <0 0 0 7>;
> -		interrupt-map = <0 0 0 1 &pci2_intc 0>,
> -				<0 0 0 2 &pci2_intc 1>,
> -				<0 0 0 3 &pci2_intc 2>,
> -				<0 0 0 4 &pci2_intc 3>;
> -
> -		pci2_intc: interrupt-controller {
> -			interrupt-controller;
> -			#address-cells = <0>;
> -			#interrupt-cells = <1>;
> -		};
> -
> -		pci2_root@0,0,0 {
> -			compatible = "pci10ee,7021";
> -			reg = <0x00000000 0 0 0 0>;
> -
> -			#address-cells = <3>;
> -			#size-cells = <2>;
> -			#interrupt-cells = <1>;
> -
> -			eg20t_bridge@1,0,0 {
> -				compatible = "pci8086,8800";
> -				reg = <0x00010000 0 0 0 0>;
> -
> -				#address-cells = <3>;
> -				#size-cells = <2>;
> -				#interrupt-cells = <1>;
> -
> -				eg20t_mac@2,0,1 {
> -					compatible = "pci8086,8802";
> -					reg = <0x00020100 0 0 0 0>;
> -					phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>;
> -				};
> -
> -				eg20t_gpio: eg20t_gpio@2,0,2 {
> -					compatible = "pci8086,8803";
> -					reg = <0x00020200 0 0 0 0>;
> -
> -					gpio-controller;
> -					#gpio-cells = <2>;
> -				};
> -
> -				eg20t_i2c@2,12,2 {
> -					compatible = "pci8086,8817";
> -					reg = <0x00026200 0 0 0 0>;
> -
> -					#address-cells = <1>;
> -					#size-cells = <0>;
> -
> -					rtc@0x68 {
> -						compatible = "st,m41t81s";
> -						reg = <0x68>;
> -					};
> -				};
> -			};
> -		};
> -	};
> -
> -	plat_regs: system-controller@17ffd000 {
> -		compatible = "img,boston-platform-regs", "syscon";
> -		reg = <0x17ffd000 0x1000>;
> -		bootph-all;
> -	};
> -
> -	clk_boston: clock {
> -		compatible = "img,boston-clock";
> -		#clock-cells = <1>;
> -		regmap = <&plat_regs>;
> -		bootph-all;
> -	};
> -
> -	reboot: syscon-reboot {
> -		compatible = "syscon-reboot";
> -		regmap = <&plat_regs>;
> -		offset = <0x10>;
> -		mask = <0x10>;
> -	};
> -
> -	uart0: uart@17ffe000 {
> -		compatible = "ns16550a";
> -		reg = <0x17ffe000 0x1000>;
> -		reg-shift = <2>;
> -		reg-io-width = <4>;
> -
> -		interrupt-parent = <&gic>;
> -		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
> -
> -		clocks = <&clk_boston BOSTON_CLK_SYS>;
> -
> -		bootph-all;
> -	};
> -
> -	lcd: lcd@17fff000 {
> -		compatible = "img,boston-lcd";
> -		reg = <0x17fff000 0x8>;
> -	};
> -
> -	flash@18000000 {
> -		compatible = "cfi-flash";
> -		reg = <0x18000000 0x8000000>;
> -		bank-width = <2>;
> -	};
> -};
> diff --git a/board/imgtec/boston/MAINTAINERS b/board/imgtec/boston/MAINTAINERS
> index 07f6156ffcbe..12e1652858bb 100644
> --- a/board/imgtec/boston/MAINTAINERS
> +++ b/board/imgtec/boston/MAINTAINERS
> @@ -1,6 +1,7 @@
>   BOSTON BOARD
>   M:	Paul Burton <paul.burton@mips.com>
>   S:	Maintained
> +F:  arch/mips/dts/boston-u-boot.dtsi
>   F:	board/imgtec/boston/
>   F:	include/configs/boston.h
>   F:	configs/boston32r2_defconfig
> diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
> index 6f0024a6663d..cb5898c3cafa 100644
> --- a/configs/boston32r2_defconfig
> +++ b/configs/boston32r2_defconfig
> @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x40000
>   CONFIG_SYS_MALLOC_F_LEN=0x400
>   CONFIG_ENV_SIZE=0x20000
>   CONFIG_ENV_SECT_SIZE=0x20000
> -CONFIG_DEFAULT_DEVICE_TREE="img,boston"
> +CONFIG_DEFAULT_DEVICE_TREE="img/boston"
>   CONFIG_SYS_LOAD_ADDR=0x88000000
>   CONFIG_ENV_ADDR=0xBFFE0000
>   CONFIG_TARGET_BOSTON=y
> diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
> index 71926429b051..4c603b69df7b 100644
> --- a/configs/boston32r2el_defconfig
> +++ b/configs/boston32r2el_defconfig
> @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x40000
>   CONFIG_SYS_MALLOC_F_LEN=0x400
>   CONFIG_ENV_SIZE=0x20000
>   CONFIG_ENV_SECT_SIZE=0x20000
> -CONFIG_DEFAULT_DEVICE_TREE="img,boston"
> +CONFIG_DEFAULT_DEVICE_TREE="img/boston"
>   CONFIG_SYS_LOAD_ADDR=0x88000000
>   CONFIG_ENV_ADDR=0xBFFE0000
>   CONFIG_TARGET_BOSTON=y
> diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig
> index 4335d04b39eb..17f7c4364a03 100644
> --- a/configs/boston32r6_defconfig
> +++ b/configs/boston32r6_defconfig
> @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x40000
>   CONFIG_SYS_MALLOC_F_LEN=0x400
>   CONFIG_ENV_SIZE=0x20000
>   CONFIG_ENV_SECT_SIZE=0x20000
> -CONFIG_DEFAULT_DEVICE_TREE="img,boston"
> +CONFIG_DEFAULT_DEVICE_TREE="img/boston"
>   CONFIG_SYS_LOAD_ADDR=0x88000000
>   CONFIG_ENV_ADDR=0xBFFE0000
>   CONFIG_TARGET_BOSTON=y
> diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig
> index b859a4f198ba..e662d167fe3d 100644
> --- a/configs/boston32r6el_defconfig
> +++ b/configs/boston32r6el_defconfig
> @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x40000
>   CONFIG_SYS_MALLOC_F_LEN=0x400
>   CONFIG_ENV_SIZE=0x20000
>   CONFIG_ENV_SECT_SIZE=0x20000
> -CONFIG_DEFAULT_DEVICE_TREE="img,boston"
> +CONFIG_DEFAULT_DEVICE_TREE="img/boston"
>   CONFIG_SYS_LOAD_ADDR=0x88000000
>   CONFIG_ENV_ADDR=0xBFFE0000
>   CONFIG_TARGET_BOSTON=y
> diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
> index 70354f117169..bf5a3ead3646 100644
> --- a/configs/boston64r2_defconfig
> +++ b/configs/boston64r2_defconfig
> @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x40000
>   CONFIG_SYS_MALLOC_F_LEN=0x400
>   CONFIG_ENV_SIZE=0x20000
>   CONFIG_ENV_SECT_SIZE=0x20000
> -CONFIG_DEFAULT_DEVICE_TREE="img,boston"
> +CONFIG_DEFAULT_DEVICE_TREE="img/boston"
>   CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
>   CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
>   CONFIG_TARGET_BOSTON=y
> diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
> index eafb8c67ba7a..de22344b5bb6 100644
> --- a/configs/boston64r2el_defconfig
> +++ b/configs/boston64r2el_defconfig
> @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x40000
>   CONFIG_SYS_MALLOC_F_LEN=0x400
>   CONFIG_ENV_SIZE=0x20000
>   CONFIG_ENV_SECT_SIZE=0x20000
> -CONFIG_DEFAULT_DEVICE_TREE="img,boston"
> +CONFIG_DEFAULT_DEVICE_TREE="img/boston"
>   CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
>   CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
>   CONFIG_TARGET_BOSTON=y
> diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig
> index a6c89278512a..bb339cfd5dbe 100644
> --- a/configs/boston64r6_defconfig
> +++ b/configs/boston64r6_defconfig
> @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x40000
>   CONFIG_SYS_MALLOC_F_LEN=0x400
>   CONFIG_ENV_SIZE=0x20000
>   CONFIG_ENV_SECT_SIZE=0x20000
> -CONFIG_DEFAULT_DEVICE_TREE="img,boston"
> +CONFIG_DEFAULT_DEVICE_TREE="img/boston"
>   CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
>   CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
>   CONFIG_TARGET_BOSTON=y
> diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig
> index 6cc227600df1..260f6dfb3583 100644
> --- a/configs/boston64r6el_defconfig
> +++ b/configs/boston64r6el_defconfig
> @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x40000
>   CONFIG_SYS_MALLOC_F_LEN=0x400
>   CONFIG_ENV_SIZE=0x20000
>   CONFIG_ENV_SECT_SIZE=0x20000
> -CONFIG_DEFAULT_DEVICE_TREE="img,boston"
> +CONFIG_DEFAULT_DEVICE_TREE="img/boston"
>   CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
>   CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
>   CONFIG_TARGET_BOSTON=y
>
Jiaxun Yang May 19, 2024, 8:57 p.m. UTC | #2 
在2024年5月19日五月 下午7:20，Daniel Schwierzeck写道：
>
> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
>
Hi Daniel,

Thanks for reviewing the series.
>
[...]
>
> should be 'select' because the switch to upstream DTS is permanent and 
> it does not make sense for the user to be able to deselect this option
>

Do you want me to send another version or are you going to fix
it as you apply the patch?

Thanks
Tom Rini May 19, 2024, 10:47 p.m. UTC | #3 
On Sun, May 19, 2024 at 09:57:03PM +0100, Jiaxun Yang wrote:
> 
> 
> 在2024年5月19日五月 下午7:20，Daniel Schwierzeck写道：
> >
> > Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
> >
> Hi Daniel,
> 
> Thanks for reviewing the series.
> >
> [...]
> >
> > should be 'select' because the switch to upstream DTS is permanent and 
> > it does not make sense for the user to be able to deselect this option
> >
> 
> Do you want me to send another version or are you going to fix
> it as you apply the patch?

So, in the case of OF_UPTREAM, it's "imply OF_UPSTREAM" everywhere else
and while there's a case to be made it should be select instead, that's
probably a future clean-up for all users.
Sumit Garg May 20, 2024, 9:52 a.m. UTC | #4 
On Mon, 20 May 2024 at 04:17, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, May 19, 2024 at 09:57:03PM +0100, Jiaxun Yang wrote:
> >
> >
> > 在2024年5月19日五月 下午7:20，Daniel Schwierzeck写道：
> > >
> > > Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
> > >
> > Hi Daniel,
> >
> > Thanks for reviewing the series.
> > >
> > [...]
> > >
> > > should be 'select' because the switch to upstream DTS is permanent and
> > > it does not make sense for the user to be able to deselect this option
> > >
> >
> > Do you want me to send another version or are you going to fix
> > it as you apply the patch?
>
> So, in the case of OF_UPTREAM, it's "imply OF_UPSTREAM" everywhere else
> and while there's a case to be made it should be select instead, that's
> probably a future clean-up for all users.

I think it depends on whether OF_UPSTREAM is enabled for a SoC (with
multiple board variants) or a single target board (I suppose that's
the case here). For the former case, "imply" would be preferred since
we can't enforce a policy at SoC level where new boards are coming up
which have to opt out of OF_UPSTREAM. For the latter case, "select"
would be preferred. However, I agree that it can be a future cleanup
patch.

-Sumit

>
> --
> Tom
diff mbox series

Patch

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 748b5175b2eb..733a8de4fb83 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -146,6 +146,7 @@  config TARGET_BOSTON
 	select SUPPORTS_CPU_MIPS64_R2
 	select SUPPORTS_CPU_MIPS64_R6
 	select SUPPORTS_LITTLE_ENDIAN
+	imply OF_UPSTREAM
 	imply BOOTSTD_FULL
 	imply CLK
 	imply CLK_BOSTON
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 14fbce597b9e..5478dcd8d025 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -3,7 +3,6 @@ 
 dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
 dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
 dtb-$(CONFIG_TARGET_AP152) += ap152.dtb
-dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
diff --git a/arch/mips/dts/boston-u-boot.dtsi b/arch/mips/dts/boston-u-boot.dtsi
new file mode 100644
index 000000000000..1b0c0a289613
--- /dev/null
+++ b/arch/mips/dts/boston-u-boot.dtsi
@@ -0,0 +1,10 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+
+&plat_regs {
+	compatible = "img,boston-platform-regs", "syscon", "simple-mfd";
+	bootph-all;
+};
+
+&clk_boston {
+	bootph-all;
+};
diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts
deleted file mode 100644
index c1a73963037d..000000000000
--- a/arch/mips/dts/img,boston.dts
+++ /dev/null
@@ -1,222 +0,0 @@ 
-/dts-v1/;
-
-#include <dt-bindings/clock/boston-clock.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/mips-gic.h>
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-	compatible = "img,boston";
-
-	chosen {
-		stdout-path = &uart0;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "img,mips";
-			reg = <0>;
-			clocks = <&clk_boston BOSTON_CLK_CPU>;
-		};
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x00000000 0x10000000>;
-	};
-
-	gic: interrupt-controller {
-		compatible = "mti,gic";
-
-		interrupt-controller;
-		#interrupt-cells = <3>;
-
-		timer {
-			compatible = "mti,gic-timer";
-			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
-			clocks = <&clk_boston BOSTON_CLK_CPU>;
-		};
-	};
-
-	pci0: pci@10000000 {
-		status = "disabled";
-		compatible = "xlnx,axi-pcie-host-1.00.a";
-		device_type = "pci";
-		reg = <0x10000000 0x2000000>;
-
-		#address-cells = <3>;
-		#size-cells = <2>;
-		#interrupt-cells = <1>;
-
-		interrupt-parent = <&gic>;
-		interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
-
-		ranges = <0x02000000 0 0x40000000
-			  0x40000000 0 0x40000000>;
-
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pci0_intc 0>,
-				<0 0 0 2 &pci0_intc 1>,
-				<0 0 0 3 &pci0_intc 2>,
-				<0 0 0 4 &pci0_intc 3>;
-
-		pci0_intc: interrupt-controller {
-			interrupt-controller;
-			#address-cells = <0>;
-			#interrupt-cells = <1>;
-		};
-	};
-
-	pci1: pci@12000000 {
-		status = "disabled";
-		compatible = "xlnx,axi-pcie-host-1.00.a";
-		device_type = "pci";
-		reg = <0x12000000 0x2000000>;
-
-		#address-cells = <3>;
-		#size-cells = <2>;
-		#interrupt-cells = <1>;
-
-		interrupt-parent = <&gic>;
-		interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
-
-		ranges = <0x02000000 0 0x20000000
-			  0x20000000 0 0x20000000>;
-
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pci1_intc 0>,
-				<0 0 0 2 &pci1_intc 1>,
-				<0 0 0 3 &pci1_intc 2>,
-				<0 0 0 4 &pci1_intc 3>;
-
-		pci1_intc: interrupt-controller {
-			interrupt-controller;
-			#address-cells = <0>;
-			#interrupt-cells = <1>;
-		};
-	};
-
-	pci2: pci@14000000 {
-		compatible = "xlnx,axi-pcie-host-1.00.a";
-		device_type = "pci";
-		reg = <0x14000000 0x2000000>;
-
-		#address-cells = <3>;
-		#size-cells = <2>;
-		#interrupt-cells = <1>;
-
-		interrupt-parent = <&gic>;
-		interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
-
-		ranges = <0x02000000 0 0x16000000
-			  0x16000000 0 0x100000>;
-
-		interrupt-map-mask = <0 0 0 7>;
-		interrupt-map = <0 0 0 1 &pci2_intc 0>,
-				<0 0 0 2 &pci2_intc 1>,
-				<0 0 0 3 &pci2_intc 2>,
-				<0 0 0 4 &pci2_intc 3>;
-
-		pci2_intc: interrupt-controller {
-			interrupt-controller;
-			#address-cells = <0>;
-			#interrupt-cells = <1>;
-		};
-
-		pci2_root@0,0,0 {
-			compatible = "pci10ee,7021";
-			reg = <0x00000000 0 0 0 0>;
-
-			#address-cells = <3>;
-			#size-cells = <2>;
-			#interrupt-cells = <1>;
-
-			eg20t_bridge@1,0,0 {
-				compatible = "pci8086,8800";
-				reg = <0x00010000 0 0 0 0>;
-
-				#address-cells = <3>;
-				#size-cells = <2>;
-				#interrupt-cells = <1>;
-
-				eg20t_mac@2,0,1 {
-					compatible = "pci8086,8802";
-					reg = <0x00020100 0 0 0 0>;
-					phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>;
-				};
-
-				eg20t_gpio: eg20t_gpio@2,0,2 {
-					compatible = "pci8086,8803";
-					reg = <0x00020200 0 0 0 0>;
-
-					gpio-controller;
-					#gpio-cells = <2>;
-				};
-
-				eg20t_i2c@2,12,2 {
-					compatible = "pci8086,8817";
-					reg = <0x00026200 0 0 0 0>;
-
-					#address-cells = <1>;
-					#size-cells = <0>;
-
-					rtc@0x68 {
-						compatible = "st,m41t81s";
-						reg = <0x68>;
-					};
-				};
-			};
-		};
-	};
-
-	plat_regs: system-controller@17ffd000 {
-		compatible = "img,boston-platform-regs", "syscon";
-		reg = <0x17ffd000 0x1000>;
-		bootph-all;
-	};
-
-	clk_boston: clock {
-		compatible = "img,boston-clock";
-		#clock-cells = <1>;
-		regmap = <&plat_regs>;
-		bootph-all;
-	};
-
-	reboot: syscon-reboot {
-		compatible = "syscon-reboot";
-		regmap = <&plat_regs>;
-		offset = <0x10>;
-		mask = <0x10>;
-	};
-
-	uart0: uart@17ffe000 {
-		compatible = "ns16550a";
-		reg = <0x17ffe000 0x1000>;
-		reg-shift = <2>;
-		reg-io-width = <4>;
-
-		interrupt-parent = <&gic>;
-		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
-
-		clocks = <&clk_boston BOSTON_CLK_SYS>;
-
-		bootph-all;
-	};
-
-	lcd: lcd@17fff000 {
-		compatible = "img,boston-lcd";
-		reg = <0x17fff000 0x8>;
-	};
-
-	flash@18000000 {
-		compatible = "cfi-flash";
-		reg = <0x18000000 0x8000000>;
-		bank-width = <2>;
-	};
-};
diff --git a/board/imgtec/boston/MAINTAINERS b/board/imgtec/boston/MAINTAINERS
index 07f6156ffcbe..12e1652858bb 100644
--- a/board/imgtec/boston/MAINTAINERS
+++ b/board/imgtec/boston/MAINTAINERS
@@ -1,6 +1,7 @@ 
 BOSTON BOARD
 M:	Paul Burton <paul.burton@mips.com>
 S:	Maintained
+F:  arch/mips/dts/boston-u-boot.dtsi
 F:	board/imgtec/boston/
 F:	include/configs/boston.h
 F:	configs/boston32r2_defconfig
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index 6f0024a6663d..cb5898c3cafa 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -4,7 +4,7 @@  CONFIG_SYS_MALLOC_LEN=0x40000
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_DEFAULT_DEVICE_TREE="img/boston"
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index 71926429b051..4c603b69df7b 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -4,7 +4,7 @@  CONFIG_SYS_MALLOC_LEN=0x40000
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_DEFAULT_DEVICE_TREE="img/boston"
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig
index 4335d04b39eb..17f7c4364a03 100644
--- a/configs/boston32r6_defconfig
+++ b/configs/boston32r6_defconfig
@@ -4,7 +4,7 @@  CONFIG_SYS_MALLOC_LEN=0x40000
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_DEFAULT_DEVICE_TREE="img/boston"
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig
index b859a4f198ba..e662d167fe3d 100644
--- a/configs/boston32r6el_defconfig
+++ b/configs/boston32r6el_defconfig
@@ -4,7 +4,7 @@  CONFIG_SYS_MALLOC_LEN=0x40000
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_DEFAULT_DEVICE_TREE="img/boston"
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 70354f117169..bf5a3ead3646 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -4,7 +4,7 @@  CONFIG_SYS_MALLOC_LEN=0x40000
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_DEFAULT_DEVICE_TREE="img/boston"
 CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index eafb8c67ba7a..de22344b5bb6 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -4,7 +4,7 @@  CONFIG_SYS_MALLOC_LEN=0x40000
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_DEFAULT_DEVICE_TREE="img/boston"
 CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig
index a6c89278512a..bb339cfd5dbe 100644
--- a/configs/boston64r6_defconfig
+++ b/configs/boston64r6_defconfig
@@ -4,7 +4,7 @@  CONFIG_SYS_MALLOC_LEN=0x40000
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_DEFAULT_DEVICE_TREE="img/boston"
 CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig
index 6cc227600df1..260f6dfb3583 100644
--- a/configs/boston64r6el_defconfig
+++ b/configs/boston64r6el_defconfig
@@ -4,7 +4,7 @@  CONFIG_SYS_MALLOC_LEN=0x40000
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="img,boston"
+CONFIG_DEFAULT_DEVICE_TREE="img/boston"
 CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y