| Message ID | 1080e31393c3e1b49735b77e7ddc14d570b83222.1733991159.git.michal.simek@amd.com |
|---|---|
| State | Accepted |
| Commit | 9ce8f720af95a5ed447ee3c565b08ef8a9898019 |
| Delegated to: | Michal Simek |
| Headers | show |
| Series | arm64: zynqmp: add clock-output-names property in clock nodes | expand |
On 12/12/24 09:12, Michal Simek wrote: > From: Naman Trivedi <naman.trivedimanojbhai@amd.com> > > Replace underscores with hyphens in the clock node names as per > dt-schema rule. > > Also, add clock-output-names property to all clock nodes, so that the > resulting clock name do not change when clock node name is changed. > > Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com> > Acked-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com> > Signed-off-by: Michal Simek <michal.simek@amd.com> > --- > > arch/arm/dts/zynqmp-clk-ccf.dtsi | 15 ++++++++++----- > 1 file changed, 10 insertions(+), 5 deletions(-) > > diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi > index 60d1b1acf9a0..385fed8a852a 100644 > --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi > +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi > @@ -10,39 +10,44 @@ > > #include <dt-bindings/clock/xlnx-zynqmp-clk.h> > / { > - pss_ref_clk: pss_ref_clk { > + pss_ref_clk: pss-ref-clk { > bootph-all; > compatible = "fixed-clock"; > #clock-cells = <0>; > clock-frequency = <33333333>; > + clock-output-names = "pss_ref_clk"; > }; > > - video_clk: video_clk { > + video_clk: video-clk { > bootph-all; > compatible = "fixed-clock"; > #clock-cells = <0>; > clock-frequency = <27000000>; > + clock-output-names = "video_clk"; > }; > > - pss_alt_ref_clk: pss_alt_ref_clk { > + pss_alt_ref_clk: pss-alt-ref-clk { > bootph-all; > compatible = "fixed-clock"; > #clock-cells = <0>; > clock-frequency = <0>; > + clock-output-names = "pss_alt_ref_clk"; > }; > > - gt_crx_ref_clk: gt_crx_ref_clk { > + gt_crx_ref_clk: gt-crx-ref-clk { > bootph-all; > compatible = "fixed-clock"; > #clock-cells = <0>; > clock-frequency = <108000000>; > + clock-output-names = "gt_crx_ref_clk"; > }; > > - aux_ref_clk: aux_ref_clk { > + aux_ref_clk: aux-ref-clk { > bootph-all; > compatible = "fixed-clock"; > #clock-cells = <0>; > clock-frequency = <27000000>; > + clock-output-names = "aux_ref_clk"; > }; > }; > Applied. M
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 60d1b1acf9a0..385fed8a852a 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -10,39 +10,44 @@ #include <dt-bindings/clock/xlnx-zynqmp-clk.h> / { - pss_ref_clk: pss_ref_clk { + pss_ref_clk: pss-ref-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <33333333>; + clock-output-names = "pss_ref_clk"; }; - video_clk: video_clk { + video_clk: video-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; + clock-output-names = "video_clk"; }; - pss_alt_ref_clk: pss_alt_ref_clk { + pss_alt_ref_clk: pss-alt-ref-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; + clock-output-names = "pss_alt_ref_clk"; }; - gt_crx_ref_clk: gt_crx_ref_clk { + gt_crx_ref_clk: gt-crx-ref-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <108000000>; + clock-output-names = "gt_crx_ref_clk"; }; - aux_ref_clk: aux_ref_clk { + aux_ref_clk: aux-ref-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; + clock-output-names = "aux_ref_clk"; }; };