Message ID | 20241121-b4-upstream-pll-fix-v1-0-904f618897a7@ti.com |
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Series | PLL Sequencing update | expand |
On Thu, 21 Nov 2024 17:32:50 +0530, Manorit Chawdhry wrote: > It has done a re-write of the full driver and the commits aren't split > to keep the bisectability intact. > > Boot Logs: https://gist.github.com/manorit2001/1eaba109d722715a233244da693133d3 > > Applied to u-boot/next, thanks!
It has done a re-write of the full driver and the commits aren't split to keep the bisectability intact. Boot Logs: https://gist.github.com/manorit2001/1eaba109d722715a233244da693133d3 Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> --- Manorit Chawdhry (3): arm: dts: k3-*-r5: Remove clocks from mcu_timer0 clk: ti: clk-k3-pll: Change variable name reg to base clk: ti: clk-k3-pll: Add additional robustness steps to the PLL sequence arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 10 - arch/arm/dts/k3-am62-r5-lp-sk.dts | 9 + arch/arm/dts/k3-am625-r5-sk.dts | 9 + arch/arm/dts/k3-am625-sk-u-boot.dtsi | 10 - arch/arm/dts/k3-am62a7-r5-sk.dts | 10 + arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 5 - arch/arm/dts/k3-am62p5-r5-sk.dts | 8 + arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 4 + arch/arm/dts/k3-j721e-r5.dtsi | 6 +- arch/arm/dts/k3-j721s2-r5.dtsi | 4 + arch/arm/dts/k3-j722s-r5-evm.dts | 8 + arch/arm/dts/k3-j784s4-r5.dtsi | 5 +- drivers/clk/ti/clk-k3-pll.c | 357 +++++++++++++++++++------ 13 files changed, 337 insertions(+), 108 deletions(-) --- base-commit: a38390284ad4261723d3a2411ba988828e994535 change-id: 20240920-b4-upstream-pll-fix-7b6a420adbb6 Best regards,