Message ID | 20220621191553.69455-2-alexandr.lobakin@intel.com |
---|---|
State | New |
Headers | show
Return-Path: <SRS0=kZPq=W4=vger.kernel.org=sparclinux-owner@ozlabs.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=lcYWsou+; dkim-atps=neutral Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LSGTd44C5z9sG2 for <incoming@patchwork.ozlabs.org>; Wed, 22 Jun 2022 05:16:37 +1000 (AEST) Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4LSGTX6CVcz4xZf for <incoming@patchwork.ozlabs.org>; Wed, 22 Jun 2022 05:16:32 +1000 (AEST) Received: by gandalf.ozlabs.org (Postfix) id 4LSGTV05ybz4xZZ; Wed, 22 Jun 2022 05:16:30 +1000 (AEST) Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: gandalf.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=sparclinux-owner@vger.kernel.org; receiver=<UNKNOWN>) Authentication-Results: gandalf.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=lcYWsou+; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4LSGTT74knz4xZ7 for <patchwork-incoming@ozlabs.org>; Wed, 22 Jun 2022 05:16:29 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353230AbiFUTQ1 (ORCPT <rfc822;patchwork-incoming@ozlabs.org>); Tue, 21 Jun 2022 15:16:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353092AbiFUTQT (ORCPT <rfc822;sparclinux@vger.kernel.org>); Tue, 21 Jun 2022 15:16:19 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4DEEB19034; Tue, 21 Jun 2022 12:16:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655838978; x=1687374978; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7oB2+/tAQ0YbLfBu8lpkzq06X+Z13qiz2lNUmx1L1VE=; b=lcYWsou+q5rKCkusMU1aZ/A6y8TdlzEIaX7h07N1R8kN+5lgzPz8pBAf xfXyDCqeQdYMA+IRRzi1UYwaP9n+VYomf3F+EvjPZmOLpZ3v3z3SJptFT ywI5i0WcNtY0tfM7xOLJWYYOLUCA7xcKUchOlYevJNqlcFLlu43m5eplc QRNBqF5BUHNpECtDCyBb85NMz/Uxh0mA8Kq6xourAV/tKc4K2yCWAlpZ2 ajo437g2aNOMxAARDH2gKbO1FBB2zEqX8lJ+bGqpEftqthO/WhIrOQNtc uaEJvLRQV7TnuWJlvQkrnAV0TdeztpIDnmenubFX8s+YNpQROoFtTgpGR w==; X-IronPort-AV: E=McAfee;i="6400,9594,10385"; a="280945616" X-IronPort-AV: E=Sophos;i="5.92,210,1650956400"; d="scan'208";a="280945616" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jun 2022 12:16:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,210,1650956400"; d="scan'208";a="585403997" Received: from irvmail001.ir.intel.com ([10.43.11.63]) by orsmga007.jf.intel.com with ESMTP; 21 Jun 2022 12:16:11 -0700 Received: from newjersey.igk.intel.com (newjersey.igk.intel.com [10.102.20.203]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id 25LJG7oA012650; Tue, 21 Jun 2022 20:16:09 +0100 From: Alexander Lobakin <alexandr.lobakin@intel.com> To: Arnd Bergmann <arnd@arndb.de>, Yury Norov <yury.norov@gmail.com> Cc: Alexander Lobakin <alexandr.lobakin@intel.com>, Andy Shevchenko <andriy.shevchenko@linux.intel.com>, Mark Rutland <mark.rutland@arm.com>, Matt Turner <mattst88@gmail.com>, Brian Cain <bcain@quicinc.com>, Geert Uytterhoeven <geert@linux-m68k.org>, Yoshinori Sato <ysato@users.sourceforge.jp>, Rich Felker <dalias@libc.org>, "David S. Miller" <davem@davemloft.net>, Kees Cook <keescook@chromium.org>, "Peter Zijlstra (Intel)" <peterz@infradead.org>, Marco Elver <elver@google.com>, Borislav Petkov <bp@suse.de>, Tony Luck <tony.luck@intel.com>, Maciej Fijalkowski <maciej.fijalkowski@intel.com>, Jesse Brandeburg <jesse.brandeburg@intel.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, linux-alpha@vger.kernel.org, linux-hexagon@vger.kernel.org, linux-ia64@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, kernel test robot <lkp@intel.com> Subject: [PATCH v4 1/8] ia64, processor: fix -Wincompatible-pointer-types in ia64_get_irr() Date: Tue, 21 Jun 2022 21:15:46 +0200 Message-Id: <20220621191553.69455-2-alexandr.lobakin@intel.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220621191553.69455-1-alexandr.lobakin@intel.com> References: <20220621191553.69455-1-alexandr.lobakin@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <sparclinux.vger.kernel.org> X-Mailing-List: sparclinux@vger.kernel.org |
Series |
bitops: let optimize out non-atomic bitops on compile-time constants
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expand
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diff --git a/arch/ia64/include/asm/processor.h b/arch/ia64/include/asm/processor.h index 7cbce290f4e5..757c2f6d8d4b 100644 --- a/arch/ia64/include/asm/processor.h +++ b/arch/ia64/include/asm/processor.h @@ -538,7 +538,7 @@ ia64_get_irr(unsigned int vector) { unsigned int reg = vector / 64; unsigned int bit = vector % 64; - u64 irr; + unsigned long irr; switch (reg) { case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break;