diff mbox series

[05/20] target/rx: Implement CPUClass::datapath_is_big_endian

Message ID 20241204202602.58083-6-philmd@linaro.org
State New
Headers show
Series target: Implement CPUClass::datapath_is_big_endian() handlers | expand

Commit Message

Philippe Mathieu-Daudé Dec. 4, 2024, 8:25 p.m. UTC 
While on RX the endianness can be set at RESET, we
do not implement that; only little endianness is used.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/rx/cpu.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 65a74ce720f..391f3214168 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -27,6 +27,15 @@ 
 #include "fpu/softfloat.h"
 #include "tcg/debug-assert.h"
 
+static bool rx_cpu_datapath_is_big_endian(CPUState *cs)
+{
+    /*
+     * Endianness is sampled via a pin at reset,
+     * but we don't implement that yet.
+     */
+    return false;
+}
+
 static void rx_cpu_set_pc(CPUState *cs, vaddr value)
 {
     RXCPU *cpu = RX_CPU(cs);
@@ -217,6 +226,7 @@  static void rx_cpu_class_init(ObjectClass *klass, void *data)
                                        &rcc->parent_phases);
 
     cc->class_by_name = rx_cpu_class_by_name;
+    cc->datapath_is_big_endian = rx_cpu_datapath_is_big_endian;
     cc->has_work = rx_cpu_has_work;
     cc->mmu_index = riscv_cpu_mmu_index;
     cc->dump_state = rx_cpu_dump_state;