Message ID | 20241104001900.682660-50-npiggin@gmail.com |
---|---|
State | New |
Headers | show
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[124.171.217.17]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7ee45a0081esm5900648a12.59.2024.11.03.16.22.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 03 Nov 2024 16:22:05 -0800 (PST) From: Nicholas Piggin <npiggin@gmail.com> To: qemu-devel@nongnu.org Cc: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org, Frederic Barrat <fbarrat@linux.ibm.com>, Michael Kowal <kowal@linux.vnet.ibm.com>, =?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@redhat.com> Subject: [PULL 49/67] pnv/xive2: Define OGEN field in the TIMA Date: Mon, 4 Nov 2024 10:18:38 +1000 Message-ID: <20241104001900.682660-50-npiggin@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241104001900.682660-1-npiggin@gmail.com> References: <20241104001900.682660-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=npiggin@gmail.com; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-ppc.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-ppc>, <mailto:qemu-ppc-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-ppc> List-Post: <mailto:qemu-ppc@nongnu.org> List-Help: <mailto:qemu-ppc-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-ppc>, <mailto:qemu-ppc-request@nongnu.org?subject=subscribe> Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org |
Series |
[PULL,01/67] target/ppc: Set ctx->opcode for decode_insn32()
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diff --git a/hw/intc/xive.c b/hw/intc/xive.c index dc86a7a3be..0e81678ab3 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -742,6 +742,10 @@ void xive_tctx_reset(XiveTCTX *tctx) tctx->regs[TM_QW1_OS + TM_LSMFB] = 0xFF; tctx->regs[TM_QW1_OS + TM_ACK_CNT] = 0xFF; tctx->regs[TM_QW1_OS + TM_AGE] = 0xFF; + if (!(xive_presenter_get_config(tctx->xptr) & + XIVE_PRESENTER_GEN1_TIMA_OS)) { + tctx->regs[TM_QW1_OS + TM_OGEN] = 2; + } /* * Initialize PIPR to 0xFF to avoid phantom interrupts when the diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h index 9d52d464d9..9062c6abf6 100644 --- a/include/hw/ppc/xive_regs.h +++ b/include/hw/ppc/xive_regs.h @@ -79,6 +79,7 @@ #define TM_INC 0x5 /* - + - + */ #define TM_AGE 0x6 /* - + - + */ #define TM_PIPR 0x7 /* - + - + */ +#define TM_OGEN 0xF /* - + - - */ /* P10 only */ #define TM_WORD0 0x0 #define TM_WORD1 0x4