From patchwork Fri Jun 5 06:42:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 481045 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 80578140218 for ; Fri, 5 Jun 2015 16:43:09 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=I6qzeI/J; dkim-atps=neutral Received: from localhost ([::1]:45487 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0lLP-0004dE-GL for incoming@patchwork.ozlabs.org; Fri, 05 Jun 2015 02:43:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0lKz-00040Y-UR for qemu-devel@nongnu.org; Fri, 05 Jun 2015 02:42:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0lKw-0006YU-J8 for qemu-devel@nongnu.org; Fri, 05 Jun 2015 02:42:41 -0400 Received: from mail-ob0-x22e.google.com ([2607:f8b0:4003:c01::22e]:34874) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0lKw-0006YM-5W for qemu-devel@nongnu.org; Fri, 05 Jun 2015 02:42:38 -0400 Received: by obbgp2 with SMTP id gp2so26230041obb.2 for ; Thu, 04 Jun 2015 23:42:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=dB/IC7PVlFI05fIuG1brgf1ylUgfLC8lhDCCRn/l+/s=; b=I6qzeI/JXzy06Xbfj5DWCIEWDDGTXCF7Rg0VK/nc1D5XblvybqUFQIz+wB54Cw2bk2 IQCnJ7bScq9TAF9V331VfyACbstNDwn/7jk1Xr2efj/1KW7tqhKlIrT23vPhvEfvj4vm S3Hmhq1fBsmLBsNopCbGlPTmPqFmDn3b7z5Lisk+T28f4nZNSfd0xSIsfQzgqto6DUmj I4GlycJnj/NKIcGzB0e++j2XOwHWdlDUub8Zw95gJHflCufV7UnCMYbk+Vafvjd1T8JC RmssYCvVFBg3vJfjZzArXc89u4ty92k7vuv4v0VCvzdgTq0cbKt9Vqi0eKWcQ/QzqNIw 90IA== X-Received: by 10.202.62.212 with SMTP id l203mr1534231oia.67.1433486557749; Thu, 04 Jun 2015 23:42:37 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id c85sm3000346oig.14.2015.06.04.23.42.36 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Thu, 04 Jun 2015 23:42:37 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org, edgar.iglesias@xilinx.com Date: Fri, 5 Jun 2015 16:42:03 +1000 Message-Id: X-Mailer: git-send-email 2.1.1 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4003:c01::22e Cc: peter.crosthwaite@xilinx.com, alistair.francis@xilinx.com Subject: [Qemu-devel] [PATCH v2 5/9] target-microblaze: Convert version_mask to a CPU property X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Originally the version_mask PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite --- V2: - Convert version_mask to a string instead of a bool hw/microblaze/petalogix_ml605_mmu.c | 2 +- target-microblaze/cpu-qom.h | 1 + target-microblaze/cpu.c | 53 ++++++++++++++++++++++++++++++++++- 3 files changed, 54 insertions(+), 2 deletions(-) diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index e9adc2f..609c90b 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -70,7 +70,7 @@ static void machine_cpu_reset(MicroBlazeCPU *cpu) env->pvr.regs[10] = 0x0e000000; /* virtex 6 */ /* setup pvr to match kernel setting */ - env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8); + env->pvr.regs[0] |= (0x14 << 8); env->pvr.regs[4] = 0xc56b8000; env->pvr.regs[5] = 0xc56be000; } diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h index d1d814b..7da25fa 100644 --- a/target-microblaze/cpu-qom.h +++ b/target-microblaze/cpu-qom.h @@ -67,6 +67,7 @@ typedef struct MicroBlazeCPU { bool use_mmu; bool dcache_writeback; bool endi; + char *version; } cfg; CPUMBState env; diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index e6167d5..a6e1872 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -26,6 +26,42 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" +static const struct { + const char *name; + uint8_t version_id; +} mb_cpu_lookup[] = { + /* These key value are as per MBV field in PVR0 */ + {"5.00.a", 0x01}, + {"5.00.b", 0x02}, + {"5.00.c", 0x03}, + {"6.00.a", 0x04}, + {"6.00.b", 0x06}, + {"7.00.a", 0x05}, + {"7.00.b", 0x07}, + {"7.10.a", 0x08}, + {"7.10.b", 0x09}, + {"7.10.c", 0x0a}, + {"7.10.d", 0x0b}, + {"7.20.a", 0x0c}, + {"7.20.b", 0x0d}, + {"7.20.c", 0x0e}, + {"7.20.d", 0x0f}, + {"7.30.a", 0x10}, + {"7.30.b", 0x11}, + {"8.00.a", 0x12}, + {"8.00.b", 0x13}, + {"8.10.a", 0x14}, + {"8.20.a", 0x15}, + {"8.20.b", 0x16}, + {"8.30.a", 0x17}, + {"8.40.a", 0x18}, + {"8.40.b", 0x19}, + {"9.0", 0x1B}, + {"9.1", 0x1D}, + {"9.2", 0x1F}, + {"9.3", 0x20}, + {NULL, 0}, +}; static void mb_cpu_set_pc(CPUState *cs, vaddr value) { @@ -88,6 +124,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(dev); MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); CPUMBState *env = &cpu->env; + uint8_t version_code = 0; + int i = 0; qemu_init_vcpu(cs); @@ -112,10 +150,22 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) | PVR2_FPU_EXC_MASK \ | 0; + for (i = 0; mb_cpu_lookup[i].name && cpu->cfg.version; i++) { + if (strcmp(mb_cpu_lookup[i].name, cpu->cfg.version) == 0) { + version_code = mb_cpu_lookup[i].version_id; + break; + } + } + + if (!version_code) { + qemu_log("Invalid MicroBlaze version number: %s\n", cpu->cfg.version); + } + env->pvr.regs[0] |= (cpu->cfg.stackprot ? PVR0_SPROT_MASK : 0) | (cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) | (cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0); - (cpu->cfg.endi ? PVR0_ENDI_MASK : 0); + (cpu->cfg.endi ? PVR0_ENDI_MASK : 0) | + (version_code << 16); env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) | (cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0); @@ -176,6 +226,7 @@ static Property mb_properties[] = { DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback, false), DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false), + DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version), DEFINE_PROP_END_OF_LIST(), };