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SRVR:BL2NAM02HT022; BCL:0; PCL:0; RULEID:; SRVR:BL2NAM02HT022; X-Forefront-PRVS: 0940A19703 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2016 22:49:21.2169 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.96]; Helo=[xsj-tvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2NAM02HT022 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.38.87 Subject: [Qemu-devel] [PATCH v6 01/13] bitops: Add MAKE_64BIT_MASK macro X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, alistair.francis@xilinx.com, crosthwaitepeter@gmail.com, edgar.iglesias@gmail.com, alex.bennee@linaro.org, afaerber@suse.de, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add a macro that creates a 64bit value which has length number of ones shifted acrros by the value of shift. Signed-off-by: Alistair Francis Reviewed-by: Alex Bennée --- V5: - Re-write to a 64-bit mask instead of ONES() - Re-order this patch in the series include/qemu/bitops.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h index 755fdd1..3c45791 100644 --- a/include/qemu/bitops.h +++ b/include/qemu/bitops.h @@ -24,6 +24,9 @@ #define BIT_WORD(nr) ((nr) / BITS_PER_LONG) #define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) +#define MAKE_64BIT_MASK(shift, length) \ + (((1ull << (length)) - 1) << shift) + /** * set_bit - Set a bit in memory * @nr: the bit to set