@@ -16,15 +16,6 @@
#define AN5206_MBAR_ADDR 0x10000000
#define AN5206_RAMBAR_ADDR 0x20000000
-/* Stub functions for hardware that doesn't exist. */
-void pic_info(Monitor *mon)
-{
-}
-
-void irq_info(Monitor *mon)
-{
-}
-
/* Board init. */
static void an5206_init(ram_addr_t ram_size,
@@ -11,16 +11,6 @@
#include "pc.h"
#include "arm-misc.h"
-/* Stub functions for hardware that doesn't exist. */
-void pic_info(Monitor *mon)
-{
-}
-
-void irq_info(Monitor *mon)
-{
-}
-
-
/* Input 0 is IRQ and input 1 is FIQ. */
static void arm_pic_cpu_handler(void *opaque, int irq, int level)
{
@@ -28,11 +28,6 @@
#define D(x)
-void pic_info(Monitor *mon)
-{}
-void irq_info(Monitor *mon)
-{}
-
static void cris_pic_cpu_handler(void *opaque, int irq, int level)
{
CPUState *env = (CPUState *)opaque;
@@ -52,6 +52,13 @@ typedef struct PicState {
uint8_t elcr; /* PIIX edge/trigger selection*/
uint8_t elcr_mask;
PicState2 *pics_state;
+#if defined(DEBUG_PIC) || defined (DEBUG_IRQ_COUNT)
+ int irq_level[16];
+#endif
+#ifdef DEBUG_IRQ_COUNT
+ uint64_t irq_count[16];
+#endif
+
} PicState;
struct PicState2 {
@@ -62,13 +69,6 @@ struct PicState2 {
void *irq_request_opaque;
};
-#if defined(DEBUG_PIC) || defined (DEBUG_IRQ_COUNT)
-static int irq_level[16];
-#endif
-#ifdef DEBUG_IRQ_COUNT
-static uint64_t irq_count[16];
-#endif
-
/* set irq level. If an edge is detected, then the IRR is set to 1 */
static inline void pic_set_irq1(PicState *s, int irq, int level)
{
@@ -183,14 +183,15 @@ static void i8259_set_irq(void *opaque, int irq,
int level)
PicState2 *s = opaque;
#if defined(DEBUG_PIC) || defined(DEBUG_IRQ_COUNT)
- if (level != irq_level[irq]) {
+ if (level != s->irq_level[irq]) {
#if defined(DEBUG_PIC)
printf("i8259_set_irq: irq=%d level=%d\n", irq, level);
#endif
- irq_level[irq] = level;
+ s->irq_level[irq] = level;
#ifdef DEBUG_IRQ_COUNT
- if (level == 1)
- irq_count[irq]++;
+ if (level == 1) {
+ s->irq_count[irq]++;
+ }
#endif
}
#endif
@@ -506,16 +507,14 @@ static void pic_init1(int io_addr, int
elcr_addr, PicState *s)
qemu_register_reset(pic_reset, s);
}
-void pic_info(Monitor *mon)
+static void pic_info(Monitor *mon, void *opaque)
{
+ PicState2 *pic = opaque;
int i;
PicState *s;
- if (!isa_pic)
- return;
-
for(i=0;i<2;i++) {
- s = &isa_pic->pics[i];
+ s = &pic->pics[i];
monitor_printf(mon, "pic%d: irr=%02x imr=%02x isr=%02x hprio=%d "
"irq_base=%02x rr_sel=%d elcr=%02x fnm=%d\n",
i, s->irr, s->imr, s->isr, s->priority_add,
@@ -524,23 +523,35 @@ void pic_info(Monitor *mon)
}
}
-void irq_info(Monitor *mon)
+static void irq_info(Monitor *mon, void *opaque)
{
#ifndef DEBUG_IRQ_COUNT
monitor_printf(mon, "irq statistic code not compiled.\n");
#else
int i;
int64_t count;
+ PicState2 *pic = opaque;
monitor_printf(mon, "IRQ statistics:\n");
for (i = 0; i < 16; i++) {
- count = irq_count[i];
- if (count > 0)
+ count = pic->irq_count[i];
+ if (count > 0) {
monitor_printf(mon, "%2d: %" PRId64 "\n", i, count);
+ }
}
#endif
}
+static const struct MonDevInfo i8259_pic_info = {
+ .dev_name = "i8259.state",
+ .dev_info_cb = pic_info,
+};
+
+static const struct MonDevInfo i8259_irq_info = {
+ .dev_name = "i8259.stats",
+ .dev_info_cb = irq_info,
+};
+
qemu_irq *i8259_init(qemu_irq parent_irq)
{
PicState2 *s;
@@ -554,5 +565,7 @@ qemu_irq *i8259_init(qemu_irq parent_irq)
s->pics[0].pics_state = s;
s->pics[1].pics_state = s;
isa_pic = s;
+ monitor_register_device_info(&i8259_pic_info, s);
+ monitor_register_device_info(&i8259_irq_info, s);
return qemu_allocate_irqs(i8259_set_irq, s, 16);
}
@@ -27,11 +27,6 @@
#define D(x)
-void pic_info(Monitor *mon)
-{}
-void irq_info(Monitor *mon)
-{}
-
static void microblaze_pic_cpu_handler(void *opaque, int irq, int level)
{
CPUState *env = (CPUState *)opaque;
@@ -29,8 +29,6 @@ qemu_irq *i8259_init(qemu_irq parent_irq);
int pic_read_irq(PicState2 *s);
void pic_update_irq(PicState2 *s);
uint32_t pic_intack_read(PicState2 *s);
-void pic_info(Monitor *mon);
-void irq_info(Monitor *mon);
/* APIC */
typedef struct IOAPICState IOAPICState;
@@ -36,16 +36,6 @@
#define BIOS_FILENAME "shix_bios.bin"
#define BIOS_ADDRESS 0xA0000000
-void irq_info(Monitor *mon)
-{
- /* XXXXX */
-}
-
-void pic_info(Monitor *mon)
-{
- /* XXXXX */
-}
-
static void shix_init(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
@@ -216,14 +216,11 @@ static CPUWriteMemoryFunc * const
slavio_intctlm_mem_write[3] = {
slavio_intctlm_mem_writel,
};
-void slavio_pic_info(Monitor *mon, DeviceState *dev)
+static void pic_info(Monitor *mon, void *opaque)
{
- SysBusDevice *sd;
- SLAVIO_INTCTLState *s;
+ SLAVIO_INTCTLState *s = opaque;
int i;
- sd = sysbus_from_qdev(dev);
- s = FROM_SYSBUS(SLAVIO_INTCTLState, sd);
for (i = 0; i < MAX_CPUS; i++) {
monitor_printf(mon, "per-cpu %d: pending 0x%08x\n", i,
s->slaves[i].intreg_pending);
@@ -232,18 +229,15 @@ void slavio_pic_info(Monitor *mon, DeviceState *dev)
s->intregm_pending, s->intregm_disabled);
}
-void slavio_irq_info(Monitor *mon, DeviceState *dev)
+static void irq_info(Monitor *mon, void *opaque)
{
#ifndef DEBUG_IRQ_COUNT
monitor_printf(mon, "irq statistic code not compiled.\n");
#else
- SysBusDevice *sd;
- SLAVIO_INTCTLState *s;
+ SLAVIO_INTCTLState *s = opaque;
int i;
int64_t count;
- sd = sysbus_from_qdev(dev);
- s = FROM_SYSBUS(SLAVIO_INTCTLState, sd);
monitor_printf(mon, "IRQ statistics:\n");
for (i = 0; i < 32; i++) {
count = s->irq_count[i];
@@ -382,6 +376,16 @@ static int vmstate_intctl_after_load(void *opaque)
return 0;
}
+static const struct MonDevInfo slavio_pic_info = {
+ .dev_name = "intctl.state",
+ .dev_info_cb = pic_info,
+};
+
+static const struct MonDevInfo slavio_irq_info = {
+ .dev_name = "intctl.stats",
+ .dev_info_cb = irq_info,
+};
+
static const VMStateDescription vmstate_intctl_cpu = {
.name ="slavio_intctl_cpu",
.version_id = 1,
@@ -447,6 +451,8 @@ static int slavio_intctl_init1(SysBusDevice *dev)
s->slaves[i].master = s;
}
vmstate_register(-1, &vmstate_intctl, s);
+ monitor_register_device_info(&slavio_pic_info, s);
+ monitor_register_device_info(&slavio_irq_info, s);
qemu_register_reset(slavio_intctl_reset, s);
slavio_intctl_reset(s);
return 0;
@@ -94,7 +94,7 @@ static CPUWriteMemoryFunc * const
sun4c_intctl_mem_write[3] = {
NULL,
};
-void sun4c_pic_info(Monitor *mon, void *opaque)
+static void pic_info(Monitor *mon, void *opaque)
{
Sun4c_INTCTLState *s = opaque;
@@ -102,7 +102,7 @@ void sun4c_pic_info(Monitor *mon, void *opaque)
s->pending, s->reg);
}
-void sun4c_irq_info(Monitor *mon, void *opaque)
+static void irq_info(Monitor *mon, void *opaque)
{
#ifndef DEBUG_IRQ_COUNT
monitor_printf(mon, "irq statistic code not compiled.\n");
@@ -169,6 +169,16 @@ static void sun4c_set_irq(void *opaque, int irq, int level)
}
}
+static const struct MonDevInfo sun4c_pic_info = {
+ .dev_name = "intctl.state",
+ .dev_info_cb = pic_info,
+};
+
+static const struct MonDevInfo sun4c_irq_info = {
+ .dev_name = "intctl.stats",
+ .dev_info_cb = irq_info,
+};
+
static const VMStateDescription vmstate_sun4c_intctl = {
.name ="sun4c_intctl",
.version_id = 1,
@@ -204,6 +214,8 @@ static int sun4c_intctl_init1(SysBusDevice *dev)
sysbus_init_irq(dev, &s->cpu_irqs[i]);
}
vmstate_register(-1, &vmstate_sun4c_intctl, s);
+ monitor_register_device_info(&sun4c_pic_info, s);
+ monitor_register_device_info(&sun4c_irq_info, s);
qemu_register_reset(sun4c_intctl_reset, s);
sun4c_intctl_reset(s);
return 0;
@@ -209,20 +209,6 @@ static void nvram_init(m48t59_t *nvram, uint8_t
*macaddr, const char *cmdline,
m48t59_write(nvram, i, image[i]);
}
-static DeviceState *slavio_intctl;
-
-void pic_info(Monitor *mon)
-{
- if (slavio_intctl)
- slavio_pic_info(mon, slavio_intctl);
-}
-
-void irq_info(Monitor *mon)
-{
- if (slavio_intctl)
- slavio_irq_info(mon, slavio_intctl);
-}
-
void cpu_check_irqs(CPUState *env)
{
if (env->pil_in && (env->interrupt_index == 0 ||
@@ -750,6 +736,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef
*hwdef, ram_addr_t RAM_size,
BlockDriverState *fd[MAX_FD];
void *fw_cfg;
DriveInfo *dinfo;
+ DeviceState *slavio_intctl;
/* init CPUs */
if (!cpu_model)
@@ -22,14 +22,6 @@ static inline void sparc_iommu_memory_write(void *opaque,
sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
}
-/* slavio_intctl.c */
-void slavio_pic_info(Monitor *mon, DeviceState *dev);
-void slavio_irq_info(Monitor *mon, DeviceState *dev);
-
-/* sun4c_intctl.c */
-void sun4c_pic_info(Monitor *mon, void *opaque);
-void sun4c_irq_info(Monitor *mon, void *opaque);
-
/* sparc32_dma.c */
#include "sparc32_dma.h"
@@ -203,14 +203,6 @@ static unsigned long sun4u_load_kernel(const char
*kernel_filename,
return kernel_size;
}
-void pic_info(Monitor *mon)
-{
-}
-
-void irq_info(Monitor *mon)
-{
-}
-
void cpu_check_irqs(CPUState *env)
{
uint32_t pil = env->pil_in | (env->softint & ~SOFTINT_TIMER) |
@@ -1844,10 +1844,6 @@ static const mon_cmd_t info_cmds[] = {
"", "show infos for each CPU" },
{ "history", "", do_info_history,
"", "show the command line history", },
- { "irq", "", irq_info,
- "", "show the interrupts statistics (if available)", },
- { "pic", "", pic_info,
- "", "show i8259 (PIC) state", },
{ "pci", "", pci_info,
"", "show PCI info", },
#if defined(TARGET_I386) || defined(TARGET_SH4)
@@ -45,10 +45,6 @@ show the cpu registers
show infos for each CPU
@item info history
show the command line history
-@item info irq
-show the interrupts statistics (if available)
-@item info pic
-show i8259 (PIC) state
@item info pci
show emulated PCI device info
@item info tlb
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> --- hw/an5206.c | 9 -------- hw/arm_pic.c | 10 --------- hw/cris_pic_cpu.c | 5 ---- hw/i8259.c | 51 +++++++++++++++++++++++++++++----------------- hw/microblaze_pic_cpu.c | 5 ---- hw/pc.h | 2 - hw/shix.c | 10 --------- hw/slavio_intctl.c | 26 ++++++++++++++--------- hw/sun4c_intctl.c | 16 ++++++++++++- hw/sun4m.c | 15 +------------ hw/sun4m.h | 8 ------- hw/sun4u.c | 8 ------- monitor.c | 4 --- qemu-monitor.hx | 4 --- 14 files changed, 63 insertions(+), 110 deletions(-)