diff mbox series

[RFC,v3,03/78] fpu/softfloat: add fallthrough pseudo-keyword

Message ID f329886becdeaa9a0b7cc2d19a02b3973266151b.1697186560.git.manos.pitsidianakis@linaro.org
State New
Headers show
Series Strict disable implicit fallthrough | expand

Commit Message

Manos Pitsidianakis Oct. 13, 2023, 8:45 a.m. UTC 
In preparation of raising -Wimplicit-fallthrough to 5, replace all
fall-through comments with the fallthrough attribute pseudo-keyword.

Signed-off-by: Emmanouil Pitsidianakis <manos.pitsidianakis@linaro.org>
---
 fpu/softfloat-parts.c.inc | 8 ++++----
 fpu/softfloat.c           | 7 ++++---
 2 files changed, 8 insertions(+), 7 deletions(-)

Comments

Alex Bennée Oct. 16, 2023, 6:56 p.m. UTC | #1 
Emmanouil Pitsidianakis <manos.pitsidianakis@linaro.org> writes:

> In preparation of raising -Wimplicit-fallthrough to 5, replace all
> fall-through comments with the fallthrough attribute pseudo-keyword.
>
> Signed-off-by: Emmanouil Pitsidianakis
> <manos.pitsidianakis@linaro.org>

Acked-by: Alex Bennée <alex.bennee@linaro.org>
diff mbox series

Patch

diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc
index a44649f4f4..df64cc7a29 100644
--- a/fpu/softfloat-parts.c.inc
+++ b/fpu/softfloat-parts.c.inc
@@ -181,7 +181,7 @@  static void partsN(uncanon_normal)(FloatPartsN *p, float_status *s,
         break;
     case float_round_to_odd:
         overflow_norm = true;
-        /* fall through */
+        fallthrough;
     case float_round_to_odd_inf:
         if (N > 64 && frac_lsb == 0) {
             inc = p->frac_hi & 1 ? 0 : round_mask;
@@ -1068,7 +1068,7 @@  static int64_t partsN(float_to_sint)(FloatPartsN *p, FloatRoundMode rmode,
     switch (p->cls) {
     case float_class_snan:
         flags |= float_flag_invalid_snan;
-        /* fall through */
+        fallthrough;
     case float_class_qnan:
         flags |= float_flag_invalid;
         r = max;
@@ -1135,7 +1135,7 @@  static uint64_t partsN(float_to_uint)(FloatPartsN *p, FloatRoundMode rmode,
     switch (p->cls) {
     case float_class_snan:
         flags |= float_flag_invalid_snan;
-        /* fall through */
+        fallthrough;
     case float_class_qnan:
         flags |= float_flag_invalid;
         r = max;
@@ -1198,7 +1198,7 @@  static int64_t partsN(float_to_sint_modulo)(FloatPartsN *p,
     switch (p->cls) {
     case float_class_snan:
         flags |= float_flag_invalid_snan;
-        /* fall through */
+        fallthrough;
     case float_class_qnan:
         flags |= float_flag_invalid;
         r = 0;
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 027a8e576d..e16e1896ee 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1835,6 +1835,7 @@  static floatx80 floatx80_round_pack_canonical(FloatParts128 *p,
             break;
         }
         /* rounded to inf -- fall through to set frac correctly */
+        fallthrough;
 
     case float_class_inf:
         /* x86 and m68k differ in the setting of the integer bit. */
@@ -2670,7 +2671,7 @@  static void parts_float_to_ahp(FloatParts64 *a, float_status *s)
     switch (a->cls) {
     case float_class_snan:
         float_raise(float_flag_invalid_snan, s);
-        /* fall through */
+        fallthrough;
     case float_class_qnan:
         /*
          * There is no NaN in the destination format.  Raise Invalid
@@ -3199,7 +3200,7 @@  static Int128 float128_to_int128_scalbn(float128 a, FloatRoundMode rmode,
     switch (p.cls) {
     case float_class_snan:
         flags |= float_flag_invalid_snan;
-        /* fall through */
+        fallthrough;
     case float_class_qnan:
         flags |= float_flag_invalid;
         r = UINT128_MAX;
@@ -3626,7 +3627,7 @@  static Int128 float128_to_uint128_scalbn(float128 a, FloatRoundMode rmode,
     switch (p.cls) {
     case float_class_snan:
         flags |= float_flag_invalid_snan;
-        /* fall through */
+        fallthrough;
     case float_class_qnan:
         flags |= float_flag_invalid;
         r = UINT128_MAX;