From patchwork Mon May 2 18:32:42 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcelo Tosatti X-Patchwork-Id: 93693 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A8BDFB6F64 for ; Tue, 3 May 2011 04:34:31 +1000 (EST) Received: from localhost ([::1]:33351 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QGxwy-0000HK-QV for incoming@patchwork.ozlabs.org; Mon, 02 May 2011 14:34:28 -0400 Received: from eggs.gnu.org ([140.186.70.92]:52327) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QGxwT-00009X-Mr for qemu-devel@nongnu.org; Mon, 02 May 2011 14:33:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QGxwR-00058K-Hc for qemu-devel@nongnu.org; Mon, 02 May 2011 14:33:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:17666) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QGxwR-00057R-1s for qemu-devel@nongnu.org; Mon, 02 May 2011 14:33:55 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p42IXrtw028792 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 2 May 2011 14:33:53 -0400 Received: from ns3.rdu.redhat.com (ns3.rdu.redhat.com [10.11.255.199]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p42IXrl3031648; Mon, 2 May 2011 14:33:53 -0400 Received: from amt.cnet (vpn-10-54.rdu.redhat.com [10.11.10.54]) by ns3.rdu.redhat.com (8.13.8/8.13.8) with ESMTP id p42IXqv0031499; Mon, 2 May 2011 14:33:52 -0400 Received: from amt.cnet (amt.cnet [127.0.0.1]) by amt.cnet (Postfix) with ESMTP id A118968A0FC; Mon, 2 May 2011 15:33:03 -0300 (BRT) Received: (from marcelo@localhost) by amt.cnet (8.14.4/8.14.4/Submit) id p42IX1Xa003550; Mon, 2 May 2011 15:33:01 -0300 From: Marcelo Tosatti To: Anthony Liguori Date: Mon, 2 May 2011 15:32:42 -0300 Message-Id: In-Reply-To: References: X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: Jan Kiszka , Marcelo Tosatti , qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [Qemu-devel] [PATCH 6/9] Redirect cpu_interrupt to callback handler X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Jan Kiszka This allows to override the interrupt handling of QEMU in system mode. KVM will make use of it to set a specialized handler. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- cpu-all.h | 14 +++++++++++++- exec.c | 4 +++- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/cpu-all.h b/cpu-all.h index 0bae6df..88126ea 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -799,7 +799,19 @@ extern CPUState *cpu_single_env; #define CPU_INTERRUPT_SIPI 0x800 /* SIPI pending. */ #define CPU_INTERRUPT_MCE 0x1000 /* (x86 only) MCE pending. */ -void cpu_interrupt(CPUState *s, int mask); +#ifndef CONFIG_USER_ONLY +typedef void (*CPUInterruptHandler)(CPUState *, int); + +extern CPUInterruptHandler cpu_interrupt_handler; + +static inline void cpu_interrupt(CPUState *s, int mask) +{ + cpu_interrupt_handler(s, mask); +} +#else /* USER_ONLY */ +void cpu_interrupt(CPUState *env, int mask); +#endif /* USER_ONLY */ + void cpu_reset_interrupt(CPUState *env, int mask); void cpu_exit(CPUState *s); diff --git a/exec.c b/exec.c index d6d8a89..a718d74 100644 --- a/exec.c +++ b/exec.c @@ -1631,7 +1631,7 @@ static void cpu_unlink_tb(CPUState *env) #ifndef CONFIG_USER_ONLY /* mask must never be zero, except for A20 change call */ -void cpu_interrupt(CPUState *env, int mask) +static void tcg_handle_interrupt(CPUState *env, int mask) { int old_mask; @@ -1658,6 +1658,8 @@ void cpu_interrupt(CPUState *env, int mask) } } +CPUInterruptHandler cpu_interrupt_handler = tcg_handle_interrupt; + #else /* CONFIG_USER_ONLY */ void cpu_interrupt(CPUState *env, int mask)