From patchwork Tue Apr 13 23:33:59 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 50183 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0DB40B7D2F for ; Thu, 15 Apr 2010 07:09:26 +1000 (EST) Received: from localhost ([127.0.0.1]:38933 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O29p3-0006Fz-AM for incoming@patchwork.ozlabs.org; Wed, 14 Apr 2010 17:08:33 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O29XV-0004mA-GJ for qemu-devel@nongnu.org; Wed, 14 Apr 2010 16:50:25 -0400 Received: from [140.186.70.92] (port=35422 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O29XH-0004Za-Hx for qemu-devel@nongnu.org; Wed, 14 Apr 2010 16:50:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O29XC-0001OT-Bm for qemu-devel@nongnu.org; Wed, 14 Apr 2010 16:50:11 -0400 Received: from are.twiddle.net ([75.149.56.221]:41944) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O29XC-0001OE-1G for qemu-devel@nongnu.org; Wed, 14 Apr 2010 16:50:06 -0400 Received: by are.twiddle.net (Postfix, from userid 5000) id 76557EC4; Wed, 14 Apr 2010 13:50:05 -0700 (PDT) Message-Id: In-Reply-To: References: From: Richard Henderson Date: Tue, 13 Apr 2010 16:33:59 -0700 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 05/21] tcg-i386: Tidy bswap operations. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Define OPC_BSWAP. Factor opcode emission to separate functions. Use bswap+shift to implement 16-bit swap instead of a rolw; this gets the proper zero-extension required by INDEX_op_bswap16_i32. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c | 53 +++++++++++++++++++++++++------------------------ 1 files changed, 27 insertions(+), 26 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 75b9915..0bafd00 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -163,6 +163,7 @@ static inline int tcg_target_const_match(tcg_target_long val, #define P_EXT 0x100 /* 0x0f opcode prefix */ +#define OPC_BSWAP (0xc8 | P_EXT) #define OPC_MOVZBL (0xb6 | P_EXT) #define OPC_MOVZWL (0xb7 | P_EXT) #define OPC_MOVSBL (0xbe | P_EXT) @@ -339,6 +340,22 @@ static inline void tcg_out_ext16s(TCGContext *s, int dest, int src) tcg_out_modrm(s, OPC_MOVSWL, dest, src); } +static inline void tcg_out_bswap32(TCGContext *s, int reg) +{ + tcg_out_opc(s, OPC_BSWAP + reg); +} + +static inline void tcg_out_bswap16(TCGContext *s, int reg, int sign) +{ + /* This swap+shift combination guarantees that the high part contains + the sign or zero extension required. It also doesn't suffer the + problem of partial register stalls that using rolw does. */ + tcg_out_bswap32(s, reg); + /* shr $16, dest */ + tcg_out_modrm(s, 0xc1, (sign ? SHIFT_SAR : SHIFT_SHR), reg); + tcg_out8(s, 16); +} + static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val, int cf) { if (!cf && ((c == ARITH_ADD && val == 1) || (c == ARITH_SUB && val == -1))) { @@ -745,31 +762,21 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, /* movzwl */ tcg_out_modrm_offset(s, OPC_MOVZWL, data_reg, r0, GUEST_BASE); if (bswap) { - /* rolw $8, data_reg */ - tcg_out8(s, 0x66); - tcg_out_modrm(s, 0xc1, 0, data_reg); - tcg_out8(s, 8); + tcg_out_bswap16(s, data_reg, 0); } break; case 1 | 4: /* movswl */ tcg_out_modrm_offset(s, OPC_MOVSWL, data_reg, r0, GUEST_BASE); if (bswap) { - /* rolw $8, data_reg */ - tcg_out8(s, 0x66); - tcg_out_modrm(s, 0xc1, 0, data_reg); - tcg_out8(s, 8); - - /* movswl data_reg, data_reg */ - tcg_out_modrm(s, OPC_MOVSWL, data_reg, data_reg); + tcg_out_bswap16(s, data_reg, 1); } break; case 2: /* movl (r0), data_reg */ tcg_out_modrm_offset(s, 0x8b, data_reg, r0, GUEST_BASE); if (bswap) { - /* bswap */ - tcg_out_opc(s, (0xc8 + data_reg) | P_EXT); + tcg_out_bswap32(s, data_reg); } break; case 3: @@ -786,11 +793,10 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, GUEST_BASE + 4); } else { tcg_out_modrm_offset(s, 0x8b, data_reg, r0, GUEST_BASE + 4); - tcg_out_opc(s, (0xc8 + data_reg) | P_EXT); + tcg_out_bswap32(s, data_reg); tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, GUEST_BASE); - /* bswap */ - tcg_out_opc(s, (0xc8 + data_reg2) | P_EXT); + tcg_out_bswap32(s, data_reg2); } break; default: @@ -982,8 +988,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, case 2: if (bswap) { tcg_out_mov(s, r1, data_reg); - /* bswap data_reg */ - tcg_out_opc(s, (0xc8 + r1) | P_EXT); + tcg_out_bswap32(s, r1); data_reg = r1; } /* movl */ @@ -992,12 +997,10 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, case 3: if (bswap) { tcg_out_mov(s, r1, data_reg2); - /* bswap data_reg */ - tcg_out_opc(s, (0xc8 + r1) | P_EXT); + tcg_out_bswap32(s, r1); tcg_out_modrm_offset(s, 0x89, r1, r0, GUEST_BASE); tcg_out_mov(s, r1, data_reg); - /* bswap data_reg */ - tcg_out_opc(s, (0xc8 + r1) | P_EXT); + tcg_out_bswap32(s, r1); tcg_out_modrm_offset(s, 0x89, r1, r0, GUEST_BASE + 4); } else { tcg_out_modrm_offset(s, 0x89, data_reg, r0, GUEST_BASE); @@ -1195,12 +1198,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_bswap16_i32: - tcg_out8(s, 0x66); - tcg_out_modrm(s, 0xc1, SHIFT_ROL, args[0]); - tcg_out8(s, 8); + tcg_out_bswap16(s, args[0], 0); break; case INDEX_op_bswap32_i32: - tcg_out_opc(s, (0xc8 + args[0]) | P_EXT); + tcg_out_bswap32(s, args[0]); break; case INDEX_op_neg_i32: