From patchwork Thu Oct 16 12:54:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 400290 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A25DA14007D for ; Thu, 16 Oct 2014 23:58:12 +1100 (AEDT) Received: from localhost ([::1]:50275 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xekd8-0007tQ-R7 for incoming@patchwork.ozlabs.org; Thu, 16 Oct 2014 08:58:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41848) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XekZa-0002AB-Qi for qemu-devel@nongnu.org; Thu, 16 Oct 2014 08:54:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XekZR-0007bj-Pi for qemu-devel@nongnu.org; Thu, 16 Oct 2014 08:54:30 -0400 Received: from mail-pd0-x22c.google.com ([2607:f8b0:400e:c02::22c]:46066) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XekZR-0007bX-8P for qemu-devel@nongnu.org; Thu, 16 Oct 2014 08:54:21 -0400 Received: by mail-pd0-f172.google.com with SMTP id ft15so3199110pdb.31 for ; Thu, 16 Oct 2014 05:54:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kqZx74hECRvMsOMsrw4bf6WNwVPaiPwSeNyiqkPnrBo=; b=IwXPp3hLfP/9Q+VB7pt1d5Oaqj9i5OL/Wxq5NXt1uNRbptzgvla2CH52P+lZQPArM0 5UdVqTmAPp7ahwQIqQSIRXAm5NaZlmXdNzjajxCDhEcCqRhqAGtK/VQYT0D8zr+93jBg /xRS+4sngipvPg76xB7LUrywOoeX1x7tMhnJTPbvRLWmUAtzk6QaqlTJCyTlozbVGGWe GGAgbwwLFHjhrmXu0t09fIrArPINTsO5fXlx0aVeP+pdsbgmVv6n8ovCMHsNn2umhn0D pml3Yn6XB3K5T/pwXD4KDMTT54P03wnIXwsEjIF0J6T3VxvCgfiNWAEc5Y4pe4hfUPZ5 6MfQ== X-Received: by 10.66.182.130 with SMTP id ee2mr1373006pac.22.1413464060270; Thu, 16 Oct 2014 05:54:20 -0700 (PDT) Received: from localhost (123-243-147-200.static.tpgi.com.au. [123.243.147.200]) by mx.google.com with ESMTPSA id k11sm15957658pbq.0.2014.10.16.05.54.18 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 16 Oct 2014 05:54:19 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org Date: Thu, 16 Oct 2014 22:54:15 +1000 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c02::22c Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, konstanty@ieee.org, martin.galvan@tallertechnologies.com Subject: [Qemu-devel] [PATCH v5 5/7] target_arm: Parameterise the irq lines for armv7m_init X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch allows the board to specifiy the number of NVIC interrupt lines when using armv7m_init. Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite --- hw/arm/armv7m.c | 7 ++++--- hw/arm/stellaris.c | 5 ++++- include/hw/arm/arm.h | 2 +- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 50281f7..7169027 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -166,14 +166,14 @@ static void armv7m_reset(void *opaque) mem_size is in bytes. Returns the NVIC array. */ -qemu_irq *armv7m_init(MemoryRegion *system_memory, int mem_size, +qemu_irq *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq, const char *kernel_filename, const char *cpu_model) { ARMCPU *cpu; CPUARMState *env; DeviceState *nvic; /* FIXME: make this local state. */ - static qemu_irq pic[64]; + qemu_irq *pic = g_new(qemu_irq, num_irq); int image_size; uint64_t entry; uint64_t lowaddr; @@ -194,11 +194,12 @@ qemu_irq *armv7m_init(MemoryRegion *system_memory, int mem_size, armv7m_bitband_init(); nvic = qdev_create(NULL, "armv7m_nvic"); + qdev_prop_set_uint32(nvic, "num-irq", num_irq); env->nvic = nvic; qdev_init_nofail(nvic); sysbus_connect_irq(SYS_BUS_DEVICE(nvic), 0, qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ)); - for (i = 0; i < 64; i++) { + for (i = 0; i < num_irq; i++) { pic[i] = qdev_get_gpio_in(nvic, i); } diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index d0c61c5..6fad10f 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -29,6 +29,8 @@ #define BP_OLED_SSI 0x02 #define BP_GAMEPAD 0x04 +#define NUM_IRQ_LINES 64 + typedef const struct { const char *name; uint32_t did0; @@ -1239,7 +1241,8 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, vmstate_register_ram_global(sram); memory_region_add_subregion(system_memory, 0x20000000, sram); - pic = armv7m_init(system_memory, flash_size, kernel_filename, cpu_model); + pic = armv7m_init(system_memory, flash_size, NUM_IRQ_LINES, + kernel_filename, cpu_model); if (board->dc1 & (1 << 16)) { dev = sysbus_create_varargs(TYPE_STELLARIS_ADC, 0x40038000, diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h index a112930..94e55a4 100644 --- a/include/hw/arm/arm.h +++ b/include/hw/arm/arm.h @@ -15,7 +15,7 @@ #include "hw/irq.h" /* armv7m.c */ -qemu_irq *armv7m_init(MemoryRegion *system_memory, int mem_size, +qemu_irq *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq, const char *kernel_filename, const char *cpu_model); /* arm_boot.c */