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([24.53.71.1]) by smtp.gmail.com with ESMTPSA id e65-20020a0dc244000000b0056cffe97a11sm604604ywd.13.2023.06.20.10.26.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Jun 2023 10:26:10 -0700 (PDT) From: Joel Upham To: qemu-devel@nongnu.org Cc: Joel Upham , Stefano Stabellini , Anthony Perard , Paul Durrant , xen-devel@lists.xenproject.org (open list:X86 Xen CPUs) Subject: [PATCH v1 08/23] xen/pt: determine the legacy/PCIe mode for a passed through device Date: Tue, 20 Jun 2023 13:24:42 -0400 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1135; envelope-from=jupham125@gmail.com; helo=mail-yw1-x1135.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Tue, 20 Jun 2023 15:45:55 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Even if we have some real PCIe device being passed through to a guest, there are situations when we cannot use its PCIe features, primarily allowing to access extended (>256) config space. Basically, we can allow reading PCIe extended config space only if both the device and emulated system are PCIe-capable. So it's a combination of checks: - PCI Express capability presence - pci_is_express(device) - pci_bus_is_express(device bus) The AND-product of these checks is stored to pcie_enabled_dev flag in XenPCIPassthroughState for later use in functions like xen_pt_pci_config_access_check. This way we get consistent behavior when the same PCIe device being passed through to either i440 domain or Q35 one. Signed-off-by: Alexey Gerasimenko Signed-off-by: Joel Upham --- hw/xen/xen_pt.c | 28 ++++++++++++++++++++++++++-- hw/xen/xen_pt.h | 1 + 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index a540149639..65c5516ef4 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -701,6 +701,21 @@ static const MemoryListener xen_pt_io_listener = { .priority = 10, }; +static inline bool xen_pt_dev_is_pcie_mode(PCIDevice *d) +{ + XenPCIPassthroughState *s = XEN_PT_DEVICE(d); + PCIBus *bus = pci_get_bus(d); + + if (bus != NULL) { + if (pci_is_express(d) && pci_bus_is_express(bus) && + xen_host_pci_find_next_cap(&s->real_device, 0, PCI_CAP_ID_EXP)) { + return true; + } + } + + return false; +} + /* destroy. */ static void xen_pt_destroy(PCIDevice *d) { @@ -787,8 +802,17 @@ static void xen_pt_realize(PCIDevice *d, Error **errp) s->real_device.dev, s->real_device.func); } - /* Initialize virtualized PCI configuration (Extended 256 Bytes) */ - memset(d->config, 0, PCI_CONFIG_SPACE_SIZE); + s->pcie_enabled_dev = xen_pt_dev_is_pcie_mode(d); + if (s->pcie_enabled_dev) { + XEN_PT_LOG(d, "Host device %04x:%02x:%02x.%d passed thru " + "in PCIe mode\n", s->real_device.domain, + s->real_device.bus, s->real_device.dev, + s->real_device.func); + } + + /* Initialize virtualized PCI configuration space (256/4K bytes) */ + memset(d->config, 0, pci_is_express(d) ? PCIE_CONFIG_SPACE_SIZE + : PCI_CONFIG_SPACE_SIZE); s->memory_listener = xen_pt_memory_listener; s->io_listener = xen_pt_io_listener; diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index b20744f7c7..1c9cd6b615 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -234,6 +234,7 @@ struct XenPCIPassthroughState { PCIHostDeviceAddress hostaddr; bool is_virtfn; + bool pcie_enabled_dev; bool permissive; bool permissive_warned; XenHostPCIDevice real_device;