@@ -42,7 +42,7 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address,
pcie_cap_flr_write_config(d, address, val, len);
pcie_cap_slot_write_config(d, address, val, len);
msi_write_config(d, address, val, len);
- /* TODO: AER */
+ pcie_aer_write_config(d, address, val, len);
}
static void xio3130_downstream_reset(DeviceState *qdev)
@@ -97,14 +97,14 @@ static int xio3130_downstream_initfn(PCIDevice *d)
return rc;
}
pcie_cap_ari_init(d);
- /* TODO: AER */
+ pcie_aer_init(d, XIO3130_AER_OFFSET);
return 0;
}
static int xio3130_downstream_exitfn(PCIDevice *d)
{
- /* TODO: AER */
+ pcie_aer_exit(d);
msi_uninit(d);
pcie_cap_exit(d);
return pci_bridge_exitfn(d);
@@ -144,7 +144,8 @@ static const VMStateDescription vmstate_xio3130_downstream = {
.post_load = pcie_cap_slot_post_load,
.fields = (VMStateField[]) {
VMSTATE_PCIE_DEVICE(port.br.dev, PCIESlot),
- /* TODO: AER */
+ VMSTATE_STRUCT(port.br.dev.exp.aer_log, PCIESlot, 0,
+ vmstate_pcie_aer_log, PCIEAERLog),
VMSTATE_END_OF_LIST()
}
};
@@ -166,7 +167,9 @@ static PCIDeviceInfo xio3130_downstream_info = {
DEFINE_PROP_UINT8("port", PCIESlot, port.port, 0),
DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
- /* TODO: AER */
+ DEFINE_PROP_UINT16("aer_log_max", PCIESlot,
+ port.br.dev.exp.aer_log.log_max,
+ PCIE_AER_LOG_MAX_DEFAULT),
DEFINE_PROP_END_OF_LIST(),
}
};
add aer support. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> --- hw/xio3130_downstream.c | 13 ++++++++----- 1 files changed, 8 insertions(+), 5 deletions(-)