From patchwork Tue Oct 7 14:13:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 397332 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 67C891400AA for ; Wed, 8 Oct 2014 01:18:58 +1100 (EST) Received: from localhost ([::1]:59179 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XbVbM-0000Ek-76 for incoming@patchwork.ozlabs.org; Tue, 07 Oct 2014 10:18:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37420) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XbVVy-0008SC-4A for qemu-devel@nongnu.org; Tue, 07 Oct 2014 10:13:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XbVVp-00012D-1q for qemu-devel@nongnu.org; Tue, 07 Oct 2014 10:13:22 -0400 Received: from mail-pa0-x234.google.com ([2607:f8b0:400e:c03::234]:44852) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XbVVo-0000zV-Oe for qemu-devel@nongnu.org; Tue, 07 Oct 2014 10:13:12 -0400 Received: by mail-pa0-f52.google.com with SMTP id fb1so7289552pad.39 for ; Tue, 07 Oct 2014 07:13:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vu1Tz3RJvc2eW5ST6eM2+eIKKHqhW3BG8/Vp04NrSnc=; b=eygy1hnQ26VsPDlokrj5HF4Nfpf4OIid9iRqnlEBjR7CW98MJFgH4uDco+s3vqQvUg +Rxve4JaxhL2ZJEj8Q1WE0sOe/bqGcysCkTkiHw0seIQ8kcZ6+/25Y7841ywi3e1oZEp NqZ3z6Z41NFiIgGE1frQRD0eeWJJxgfQMgcqlU2gkG5Mq4r0G+pUldvzpyEooEOUHqXF Pju3NcqIpt3t6zw9LblcpIJyg7NxiWJqS2KB5VI5XuUhiz0wfSspsF3/RnHOG5VmI06F mvRVbxPo9IoV/f06sPkh4uhOfARBkbXEBtgQTR8KjkV9Gmu3WOOahszRC+Z/NlTufAX0 fkRw== X-Received: by 10.68.108.226 with SMTP id hn2mr3925917pbb.29.1412691191155; Tue, 07 Oct 2014 07:13:11 -0700 (PDT) Received: from localhost (123-243-147-200.static.tpgi.com.au. [123.243.147.200]) by mx.google.com with ESMTPSA id va2sm16465640pac.15.2014.10.07.07.13.09 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 07 Oct 2014 07:13:10 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org Date: Wed, 8 Oct 2014 00:13:06 +1000 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::234 Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, konstanty@ieee.org, martin.galvan@tallertechnologies.com Subject: [Qemu-devel] [Patch v4 6/8] target_arm: Change the reset values based on the ELF entry X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The Netduino 2 machine won't run unless the reset_pc is based on the ELF entry point. Signed-off-by: Alistair Francis Signed-off-by: Peter Crosthwaite --- V2: - Malloc straight away, thanks to Peter C hw/arm/armv7m.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 7169027..07b36e2 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -155,11 +155,19 @@ static void armv7m_bitband_init(void) /* Board init. */ +typedef struct ARMV7MResetArgs { + ARMCPU *cpu; + uint32_t reset_pc; +} ARMV7MResetArgs; + static void armv7m_reset(void *opaque) { - ARMCPU *cpu = opaque; + ARMV7MResetArgs *args = opaque; + + cpu_reset(CPU(args->cpu)); - cpu_reset(CPU(cpu)); + args->cpu->env.thumb = args->reset_pc & 1; + args->cpu->env.regs[15] = args->reset_pc & ~1; } /* Init CPU and memory for a v7-M based board. @@ -180,6 +188,7 @@ qemu_irq *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq, int i; int big_endian; MemoryRegion *hack = g_new(MemoryRegion, 1); + ARMV7MResetArgs *reset_args = g_new0(ARMV7MResetArgs, 1); if (cpu_model == NULL) { cpu_model = "cortex-m3"; @@ -234,7 +243,11 @@ qemu_irq *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq, vmstate_register_ram_global(hack); memory_region_add_subregion(system_memory, 0xfffff000, hack); - qemu_register_reset(armv7m_reset, cpu); + *reset_args = (ARMV7MResetArgs) { + .cpu = cpu, + .reset_pc = entry, + }; + qemu_register_reset(armv7m_reset, reset_args); return pic; }