diff mbox

[21/25] mips: bump migration version to 4

Message ID b6930dd52c227c977e8cf0aa6bf0848408b3f4e7.1319550280.git.quintela@redhat.com
State New
Headers show

Commit Message

Juan Quintela Oct. 25, 2011, 2 p.m. UTC 
bcond state was stored as int32, but it is target_ulong.  Change migration state
to reflect that.

Signed-off-by: Juan Quintela <quintela@redhat.com>
CC: Aurelien Jarno <aurelien@aurel32.net>
---
 target-mips/cpu.h     |    2 +-
 target-mips/machine.c |   10 ++++------
 2 files changed, 5 insertions(+), 7 deletions(-)
diff mbox

Patch

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 7ca751b..7810924 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -507,7 +507,7 @@  void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf);
 #define cpu_signal_handler cpu_mips_signal_handler
 #define cpu_list mips_cpu_list

-#define CPU_SAVE_VERSION 3
+#define CPU_SAVE_VERSION 4

 /* MMU modes definitions. We carefully match the indices with our
    hflags layout. */
diff --git a/target-mips/machine.c b/target-mips/machine.c
index a55fbb6..134dbd5 100644
--- a/target-mips/machine.c
+++ b/target-mips/machine.c
@@ -84,8 +84,7 @@  void cpu_save(QEMUFile *f, void *opaque)
     qemu_put_sbe32s(f, &env->error_code);
     qemu_put_be32s(f, &env->hflags);
     qemu_put_betls(f, &env->btarget);
-    i = env->bcond;
-    qemu_put_sbe32s(f, &i);
+    qemu_put_betls(f, &env->bcond);

     /* Save remaining CP1 registers */
     qemu_put_sbe32s(f, &env->CP0_Index);
@@ -193,9 +192,9 @@  int cpu_load(QEMUFile *f, void *opaque, int version_id)
     CPUState *env = opaque;
     int i;

-    if (version_id != 3)
+    if (version_id != 4) {
         return -EINVAL;
-
+    }
     /* Load active TC */
     load_tc(f, &env->active_tc);

@@ -236,8 +235,7 @@  int cpu_load(QEMUFile *f, void *opaque, int version_id)
     qemu_get_sbe32s(f, &env->error_code);
     qemu_get_be32s(f, &env->hflags);
     qemu_get_betls(f, &env->btarget);
-    qemu_get_sbe32s(f, &i);
-    env->bcond = i;
+    qemu_get_betls(f, &env->bcond);

     /* Load remaining CP1 registers */
     qemu_get_sbe32s(f, &env->CP0_Index);