From patchwork Wed Oct 26 20:16:30 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juan Quintela X-Patchwork-Id: 121990 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6B0DA1007DA for ; Thu, 27 Oct 2011 07:28:54 +1100 (EST) Received: from localhost ([::1]:56622 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RJA5j-0000KG-Rf for incoming@patchwork.ozlabs.org; Wed, 26 Oct 2011 16:28:51 -0400 Received: from eggs.gnu.org ([140.186.70.92]:36499) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RJA5c-0000KB-1c for qemu-devel@nongnu.org; Wed, 26 Oct 2011 16:28:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RJA5X-00022d-Uy for qemu-devel@nongnu.org; Wed, 26 Oct 2011 16:28:43 -0400 Received: from mx1.redhat.com ([209.132.183.28]:10457) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RJA5X-0001xX-HL for qemu-devel@nongnu.org; Wed, 26 Oct 2011 16:28:39 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p9QKSM2r007856 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 26 Oct 2011 16:28:23 -0400 Received: from neno.neno (ovpn-116-28.ams2.redhat.com [10.36.116.28]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p9QKHule018327; Wed, 26 Oct 2011 16:27:42 -0400 From: Juan Quintela To: qemu-devel@nongnu.org Date: Wed, 26 Oct 2011 22:16:30 +0200 Message-Id: In-Reply-To: References: In-Reply-To: References: X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 209.132.183.28 Cc: Huacai Chen , Peter Maydell , Alexander Graf , Blue Swirl , Max Filippov , Michael Walle , Paul Brook , "Edgar E. Iglesias" , Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH 16/28] vmstate: port sparc cpu X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Juan Quintela --- hw/sun4u.c | 20 -- target-sparc/cpu.h | 9 +- target-sparc/machine.c | 482 ++++++++++++++++++++++++++++-------------------- 3 files changed, 283 insertions(+), 228 deletions(-) diff --git a/hw/sun4u.c b/hw/sun4u.c index eaaefe3..b0f671d 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -324,26 +324,6 @@ typedef struct ResetData { uint64_t prom_addr; } ResetData; -void cpu_put_timer(QEMUFile *f, CPUTimer *s) -{ - qemu_put_be32s(f, &s->frequency); - qemu_put_be32s(f, &s->disabled); - qemu_put_be64s(f, &s->disabled_mask); - qemu_put_sbe64s(f, &s->clock_offset); - - qemu_put_timer(f, s->qtimer); -} - -void cpu_get_timer(QEMUFile *f, CPUTimer *s) -{ - qemu_get_be32s(f, &s->frequency); - qemu_get_be32s(f, &s->disabled); - qemu_get_be64s(f, &s->disabled_mask); - qemu_get_sbe64s(f, &s->clock_offset); - - qemu_get_timer(f, s->qtimer); -} - static CPUTimer* cpu_timer_create(const char* name, CPUState *env, QEMUBHFunc *cb, uint32_t frequency, uint64_t disabled_mask) diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 6bf9275..27fbf4e 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -352,10 +352,6 @@ struct CPUTimer typedef struct CPUTimer CPUTimer; -struct QEMUFile; -void cpu_put_timer(struct QEMUFile *f, CPUTimer *s); -void cpu_get_timer(struct QEMUFile *f, CPUTimer *s); - typedef struct CPUSPARCState { target_ulong gregs[8]; /* general registers */ target_ulong *regwptr; /* pointer to current register window */ @@ -482,6 +478,9 @@ typedef struct CPUSPARCState { /* Leon3 cache control */ uint32_t cache_control; + + /* Fields needed as intermediate for vmstate */ + uint32_t psr_vmstate; } CPUSPARCState; #ifndef NO_CPU_IO_DEFS @@ -569,8 +568,6 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); #define cpu_signal_handler cpu_sparc_signal_handler #define cpu_list sparc_cpu_list -#define CPU_SAVE_VERSION 7 - /* MMU modes definitions */ #if defined (TARGET_SPARC64) #define MMU_USER_IDX 0 diff --git a/target-sparc/machine.c b/target-sparc/machine.c index 56ae041..5ba098e 100644 --- a/target-sparc/machine.c +++ b/target-sparc/machine.c @@ -4,222 +4,300 @@ #include "cpu.h" -void cpu_save(QEMUFile *f, void *opaque) -{ - CPUState *env = opaque; - int i; - uint32_t tmp; - - // if env->cwp == env->nwindows - 1, this will set the ins of the last - // window as the outs of the first window - cpu_set_cwp(env, env->cwp); +static const VMStateDescription vmstate_cpu_timer = { + .name = "cpu_timer", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32(frequency, CPUTimer), + VMSTATE_UINT32(disabled, CPUTimer), + VMSTATE_UINT64(disabled_mask, CPUTimer), + VMSTATE_INT64(clock_offset, CPUTimer), + VMSTATE_TIMER(qtimer, CPUTimer), + VMSTATE_END_OF_LIST() + } +}; - for(i = 0; i < 8; i++) - qemu_put_betls(f, &env->gregs[i]); - qemu_put_be32s(f, &env->nwindows); - for(i = 0; i < env->nwindows * 16; i++) - qemu_put_betls(f, &env->regbase[i]); +#define VMSTATE_CPU_TIMER(_f, _s) \ + VMSTATE_STRUCT_POINTER(_f, _s, vmstate_cpu_timer, CPUTimer *) - /* FPU */ - for(i = 0; i < TARGET_FPREGS; i++) { - union { - float32 f; - uint32_t i; - } u; - u.f = env->fpr[i]; - qemu_put_be32(f, u.i); +#if defined(TARGET_SPARC64) +static const VMStateDescription vmstate_trap_state = { + .name = "trap_state", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT64(tpc, trap_state), + VMSTATE_UINT64(tnpc, trap_state), + VMSTATE_UINT64(tstate, trap_state), + VMSTATE_UINT32(tt, trap_state), + VMSTATE_END_OF_LIST() } +}; - qemu_put_betls(f, &env->pc); - qemu_put_betls(f, &env->npc); - qemu_put_betls(f, &env->y); - tmp = cpu_get_psr(env); - qemu_put_be32(f, tmp); - qemu_put_betls(f, &env->fsr); - qemu_put_betls(f, &env->tbr); - tmp = env->interrupt_index; - qemu_put_be32(f, tmp); - qemu_put_be32s(f, &env->pil_in); -#ifndef TARGET_SPARC64 - qemu_put_be32s(f, &env->wim); - /* MMU */ - for (i = 0; i < 32; i++) - qemu_put_be32s(f, &env->mmuregs[i]); - for (i = 0; i < 4; i++) { - qemu_put_be64s(f, &env->mxccdata[i]); - } - for (i = 0; i < 8; i++) { - qemu_put_be64s(f, &env->mxccregs[i]); - } - qemu_put_be32s(f, &env->mmubpctrv); - qemu_put_be32s(f, &env->mmubpctrc); - qemu_put_be32s(f, &env->mmubpctrs); - qemu_put_be64s(f, &env->mmubpaction); - for (i = 0; i < 4; i++) { - qemu_put_be64s(f, &env->mmubpregs[i]); +static const VMStateDescription vmstate_tlb_entry = { + .name = "tlb_entry", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT64(tag, SparcTLBEntry), + VMSTATE_UINT64(tte, SparcTLBEntry), + VMSTATE_END_OF_LIST() } -#else - qemu_put_be64s(f, &env->lsu); - for (i = 0; i < 16; i++) { - qemu_put_be64s(f, &env->immuregs[i]); - qemu_put_be64s(f, &env->dmmuregs[i]); - } - for (i = 0; i < 64; i++) { - qemu_put_be64s(f, &env->itlb[i].tag); - qemu_put_be64s(f, &env->itlb[i].tte); - qemu_put_be64s(f, &env->dtlb[i].tag); - qemu_put_be64s(f, &env->dtlb[i].tte); - } - qemu_put_be32s(f, &env->mmu_version); - for (i = 0; i < MAXTL_MAX; i++) { - qemu_put_be64s(f, &env->ts[i].tpc); - qemu_put_be64s(f, &env->ts[i].tnpc); - qemu_put_be64s(f, &env->ts[i].tstate); - qemu_put_be32s(f, &env->ts[i].tt); - } - qemu_put_be32s(f, &env->xcc); - qemu_put_be32s(f, &env->asi); - qemu_put_be32s(f, &env->pstate); - qemu_put_be32s(f, &env->tl); - qemu_put_be32s(f, &env->cansave); - qemu_put_be32s(f, &env->canrestore); - qemu_put_be32s(f, &env->otherwin); - qemu_put_be32s(f, &env->wstate); - qemu_put_be32s(f, &env->cleanwin); - for (i = 0; i < 8; i++) - qemu_put_be64s(f, &env->agregs[i]); - for (i = 0; i < 8; i++) - qemu_put_be64s(f, &env->bgregs[i]); - for (i = 0; i < 8; i++) - qemu_put_be64s(f, &env->igregs[i]); - for (i = 0; i < 8; i++) - qemu_put_be64s(f, &env->mgregs[i]); - qemu_put_be64s(f, &env->fprs); - qemu_put_be64s(f, &env->tick_cmpr); - qemu_put_be64s(f, &env->stick_cmpr); - cpu_put_timer(f, env->tick); - cpu_put_timer(f, env->stick); - qemu_put_be64s(f, &env->gsr); - qemu_put_be32s(f, &env->gl); - qemu_put_be64s(f, &env->hpstate); - for (i = 0; i < MAXTL_MAX; i++) - qemu_put_be64s(f, &env->htstate[i]); - qemu_put_be64s(f, &env->hintp); - qemu_put_be64s(f, &env->htba); - qemu_put_be64s(f, &env->hver); - qemu_put_be64s(f, &env->hstick_cmpr); - qemu_put_be64s(f, &env->ssr); - cpu_put_timer(f, env->hstick); +}; #endif -} -int cpu_load(QEMUFile *f, void *opaque, int version_id) +static void cpu_pre_save(void *opaque) { CPUState *env = opaque; - int i; - uint32_t tmp; - if (version_id < 6) - return -EINVAL; - for(i = 0; i < 8; i++) - qemu_get_betls(f, &env->gregs[i]); - qemu_get_be32s(f, &env->nwindows); - for(i = 0; i < env->nwindows * 16; i++) - qemu_get_betls(f, &env->regbase[i]); + /* if env->cwp == env->nwindows - 1, this will set the ins of the last + * window as the outs of the first window + */ + cpu_set_cwp(env, env->cwp); + env->psr_vmstate = cpu_get_psr(env); +} - /* FPU */ - for(i = 0; i < TARGET_FPREGS; i++) { - union { - float32 f; - uint32_t i; - } u; - u.i = qemu_get_be32(f); - env->fpr[i] = u.f; - } +static int cpu_post_load(void *opaque, int version_id) +{ + CPUState *env = opaque; - qemu_get_betls(f, &env->pc); - qemu_get_betls(f, &env->npc); - qemu_get_betls(f, &env->y); - tmp = qemu_get_be32(f); env->cwp = 0; /* needed to ensure that the wrapping registers are correctly updated */ - cpu_put_psr(env, tmp); - qemu_get_betls(f, &env->fsr); - qemu_get_betls(f, &env->tbr); - tmp = qemu_get_be32(f); - env->interrupt_index = tmp; - qemu_get_be32s(f, &env->pil_in); -#ifndef TARGET_SPARC64 - qemu_get_be32s(f, &env->wim); - /* MMU */ - for (i = 0; i < 32; i++) - qemu_get_be32s(f, &env->mmuregs[i]); - for (i = 0; i < 4; i++) { - qemu_get_be64s(f, &env->mxccdata[i]); - } - for (i = 0; i < 8; i++) { - qemu_get_be64s(f, &env->mxccregs[i]); - } - qemu_get_be32s(f, &env->mmubpctrv); - qemu_get_be32s(f, &env->mmubpctrc); - qemu_get_be32s(f, &env->mmubpctrs); - qemu_get_be64s(f, &env->mmubpaction); - for (i = 0; i < 4; i++) { - qemu_get_be64s(f, &env->mmubpregs[i]); - } -#else - qemu_get_be64s(f, &env->lsu); - for (i = 0; i < 16; i++) { - qemu_get_be64s(f, &env->immuregs[i]); - qemu_get_be64s(f, &env->dmmuregs[i]); - } - for (i = 0; i < 64; i++) { - qemu_get_be64s(f, &env->itlb[i].tag); - qemu_get_be64s(f, &env->itlb[i].tte); - qemu_get_be64s(f, &env->dtlb[i].tag); - qemu_get_be64s(f, &env->dtlb[i].tte); - } - qemu_get_be32s(f, &env->mmu_version); - for (i = 0; i < MAXTL_MAX; i++) { - qemu_get_be64s(f, &env->ts[i].tpc); - qemu_get_be64s(f, &env->ts[i].tnpc); - qemu_get_be64s(f, &env->ts[i].tstate); - qemu_get_be32s(f, &env->ts[i].tt); - } - qemu_get_be32s(f, &env->xcc); - qemu_get_be32s(f, &env->asi); - qemu_get_be32s(f, &env->pstate); - qemu_get_be32s(f, &env->tl); - qemu_get_be32s(f, &env->cansave); - qemu_get_be32s(f, &env->canrestore); - qemu_get_be32s(f, &env->otherwin); - qemu_get_be32s(f, &env->wstate); - qemu_get_be32s(f, &env->cleanwin); - for (i = 0; i < 8; i++) - qemu_get_be64s(f, &env->agregs[i]); - for (i = 0; i < 8; i++) - qemu_get_be64s(f, &env->bgregs[i]); - for (i = 0; i < 8; i++) - qemu_get_be64s(f, &env->igregs[i]); - for (i = 0; i < 8; i++) - qemu_get_be64s(f, &env->mgregs[i]); - qemu_get_be64s(f, &env->fprs); - qemu_get_be64s(f, &env->tick_cmpr); - qemu_get_be64s(f, &env->stick_cmpr); - cpu_get_timer(f, env->tick); - cpu_get_timer(f, env->stick); - qemu_get_be64s(f, &env->gsr); - qemu_get_be32s(f, &env->gl); - qemu_get_be64s(f, &env->hpstate); - for (i = 0; i < MAXTL_MAX; i++) - qemu_get_be64s(f, &env->htstate[i]); - qemu_get_be64s(f, &env->hintp); - qemu_get_be64s(f, &env->htba); - qemu_get_be64s(f, &env->hver); - qemu_get_be64s(f, &env->hstick_cmpr); - qemu_get_be64s(f, &env->ssr); - cpu_get_timer(f, env->hstick); -#endif + cpu_put_psr(env, env->psr_vmstate); tlb_flush(env, 1); return 0; } + +const VMStateDescription vmstate_cpu = { + .name = "cpu", + .version_id = 7, + .minimum_version_id = 7, + .minimum_version_id_old = 7, + .pre_save = cpu_pre_save, + .post_load = cpu_post_load, + .fields = (VMStateField[]) { + VMSTATE_UINTTL_ARRAY(gregs, CPUState, 8), + VMSTATE_UINT32(nwindows, CPUState), + VMSTATE_VARRAY_MULTIPLY(regbase, CPUState, nwindows, 16, + vmstate_info_uinttls, target_ulong), + VMSTATE_FLOAT32_ARRAY(fpr, CPUState, TARGET_FPREGS), + VMSTATE_UINTTL(pc, CPUState), + VMSTATE_UINTTL(npc, CPUState), + VMSTATE_UINTTL(y, CPUState), + VMSTATE_UINT32(psr_vmstate, CPUState), + VMSTATE_UINTTL(fsr, CPUState), + VMSTATE_UINTTL(tbr, CPUState), + VMSTATE_INT32(interrupt_index, CPUState), + VMSTATE_UINT32(pil_in, CPUState), +#ifndef TARGET_SPARC64 + /* MMU */ + VMSTATE_UINT32(wim, CPUState), + VMSTATE_UINT32_ARRAY(mmuregs, CPUState, 32), + VMSTATE_UINT64_ARRAY(mxccdata, CPUState, 4), + VMSTATE_UINT64_ARRAY(mxccregs, CPUState, 8), + VMSTATE_UINT32(mmubpctrv, CPUState), + VMSTATE_UINT32(mmubpctrc, CPUState), + VMSTATE_UINT32(mmubpctrs, CPUState), + VMSTATE_UINT64(mmubpaction, CPUState), + VMSTATE_UINT64_ARRAY(mmubpregs, CPUState, 4), +#else + VMSTATE_UINT64(lsu, CPUState), + VMSTATE_UINT64(immuregs[0], CPUState), + VMSTATE_UINT64(dmmuregs[0], CPUState), + VMSTATE_UINT64(immuregs[1], CPUState), + VMSTATE_UINT64(dmmuregs[1], CPUState), + VMSTATE_UINT64(immuregs[2], CPUState), + VMSTATE_UINT64(dmmuregs[2], CPUState), + VMSTATE_UINT64(immuregs[3], CPUState), + VMSTATE_UINT64(dmmuregs[3], CPUState), + VMSTATE_UINT64(immuregs[4], CPUState), + VMSTATE_UINT64(dmmuregs[4], CPUState), + VMSTATE_UINT64(immuregs[5], CPUState), + VMSTATE_UINT64(dmmuregs[5], CPUState), + VMSTATE_UINT64(immuregs[6], CPUState), + VMSTATE_UINT64(dmmuregs[6], CPUState), + VMSTATE_UINT64(immuregs[7], CPUState), + VMSTATE_UINT64(dmmuregs[7], CPUState), + VMSTATE_UINT64(immuregs[8], CPUState), + VMSTATE_UINT64(dmmuregs[8], CPUState), + VMSTATE_UINT64(immuregs[9], CPUState), + VMSTATE_UINT64(dmmuregs[9], CPUState), + VMSTATE_UINT64(immuregs[10], CPUState), + VMSTATE_UINT64(dmmuregs[10], CPUState), + VMSTATE_UINT64(immuregs[11], CPUState), + VMSTATE_UINT64(dmmuregs[11], CPUState), + VMSTATE_UINT64(immuregs[12], CPUState), + VMSTATE_UINT64(dmmuregs[12], CPUState), + VMSTATE_UINT64(immuregs[13], CPUState), + VMSTATE_UINT64(dmmuregs[13], CPUState), + VMSTATE_UINT64(immuregs[14], CPUState), + VMSTATE_UINT64(dmmuregs[14], CPUState), + VMSTATE_UINT64(immuregs[15], CPUState), + VMSTATE_UINT64(dmmuregs[15], CPUState), + VMSTATE_STRUCT(itlb[0], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[0], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[1], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[1], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[2], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[2], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[3], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[3], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[4], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[4], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[5], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[5], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[6], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[6], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[7], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[7], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[8], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[8], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[9], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[9], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[10], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[10], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[11], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[11], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[12], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[12], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[13], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[13], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[14], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[14], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[15], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[15], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[16], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[16], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[17], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[17], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[18], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[18], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[19], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[19], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[20], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[20], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[21], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[21], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[22], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[22], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[23], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[23], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[24], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[24], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[25], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[25], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[26], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[26], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[27], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[27], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[28], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[28], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[29], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[29], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[30], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[30], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[31], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[31], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[32], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[32], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[33], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[33], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[34], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[34], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[35], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[35], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[36], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[36], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[37], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[37], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[38], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[38], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[39], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[39], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[40], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[40], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[41], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[41], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[42], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[42], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[43], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[43], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[44], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[44], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[45], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[45], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[46], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[46], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[47], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[47], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[48], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[48], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[49], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[49], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[50], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[50], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[51], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[51], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[52], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[52], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[53], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[53], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[54], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[54], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[55], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[55], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[56], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[56], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[57], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[57], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[58], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[58], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[59], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[59], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[60], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[60], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[61], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[61], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[62], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[62], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(itlb[63], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_STRUCT(dtlb[63], CPUState, 0, vmstate_tlb_entry, SparcTLBEntry), + VMSTATE_UINT32(mmu_version, CPUState), + VMSTATE_STRUCT_ARRAY(ts, CPUState, MAXTL_MAX, 0, + vmstate_trap_state, trap_state), + VMSTATE_UINT32(xcc, CPUState), + VMSTATE_UINT32(asi, CPUState), + VMSTATE_UINT32(pstate, CPUState), + VMSTATE_UINT32(tl, CPUState), + VMSTATE_UINT32(cansave, CPUState), + VMSTATE_UINT32(canrestore, CPUState), + VMSTATE_UINT32(otherwin, CPUState), + VMSTATE_UINT32(wstate, CPUState), + VMSTATE_UINT32(cleanwin, CPUState), + VMSTATE_UINT64_ARRAY(agregs, CPUState, 8), + VMSTATE_UINT64_ARRAY(bgregs, CPUState, 8), + VMSTATE_UINT64_ARRAY(igregs, CPUState, 8), + VMSTATE_UINT64_ARRAY(mgregs, CPUState, 8), + VMSTATE_UINT64(fprs, CPUState), + VMSTATE_UINT64(tick_cmpr, CPUState), + VMSTATE_UINT64(stick_cmpr, CPUState), + VMSTATE_CPU_TIMER(tick, CPUState), + VMSTATE_CPU_TIMER(stick, CPUState), + VMSTATE_UINT64(gsr, CPUState), + VMSTATE_UINT32(gl, CPUState), + VMSTATE_UINT64(hpstate, CPUState), + VMSTATE_UINT64_ARRAY(htstate, CPUState, MAXTL_MAX), + VMSTATE_UINT64(hintp, CPUState), + VMSTATE_UINT64(htba, CPUState), + VMSTATE_UINT64(hver, CPUState), + VMSTATE_UINT64(hstick_cmpr, CPUState), + VMSTATE_UINT64(ssr, CPUState), + VMSTATE_CPU_TIMER(hstick, CPUState), +#endif + VMSTATE_END_OF_LIST() + }, +};