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([24.53.71.1]) by smtp.gmail.com with ESMTPSA id e65-20020a0dc244000000b0056cffe97a11sm604604ywd.13.2023.06.20.10.26.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Jun 2023 10:26:08 -0700 (PDT) From: Joel Upham To: qemu-devel@nongnu.org Cc: Joel Upham , Stefano Stabellini , Anthony Perard , Paul Durrant , xen-devel@lists.xenproject.org (open list:X86 Xen CPUs) Subject: [PATCH v1 07/23] xen/pt: avoid reading PCIe device type and cap version multiple times Date: Tue, 20 Jun 2023 13:24:41 -0400 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::72a; envelope-from=jupham125@gmail.com; helo=mail-qk1-x72a.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Tue, 20 Jun 2023 15:45:54 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org xen_pt_config_init.c reads Device/Port Type and Capability version fields in many places. Two functions are used for this purpose: get_capability_version and get_device_type. These functions perform PCI conf space reading every time they're called. Another bad thing is that these functions know nothing about where PCI Expess Capability is located, so its offset must be provided explicitly in function arguments. Their typical usage is like this: uint8_t cap_ver = get_capability_version(s, real_offset - reg->offset); uint8_t dev_type = get_device_type(s, real_offset - reg->offset); To avoid this, the PCI Express Capability register now being read only once and stored in XenHostPCIDevice structure (pcie_flags field). The capabiliy offset parameter is no longer needed, simplifying functions usage. Also, get_device_type and get_capability_version were renamed to more descriptive get_pcie_device_type and get_pcie_capability_version. Signed-off-by: Alexey Gerasimenko Signed-off-by: Joel Upham --- hw/xen/xen-host-pci-device.c | 15 +++++++++++++++ hw/xen/xen-host-pci-device.h | 1 + hw/xen/xen_pt_config_init.c | 34 ++++++++++++++-------------------- 3 files changed, 30 insertions(+), 20 deletions(-) diff --git a/hw/xen/xen-host-pci-device.c b/hw/xen/xen-host-pci-device.c index a7021a5d56..63481a859e 100644 --- a/hw/xen/xen-host-pci-device.c +++ b/hw/xen/xen-host-pci-device.c @@ -405,6 +405,7 @@ void xen_host_pci_device_get(XenHostPCIDevice *d, uint16_t domain, { ERRP_GUARD(); unsigned int v; + int pcie_cap_pos; d->config_fd = -1; d->domain = domain; @@ -449,6 +450,20 @@ void xen_host_pci_device_get(XenHostPCIDevice *d, uint16_t domain, d->is_virtfn = xen_host_pci_dev_is_virtfn(d); d->has_pcie_ext_caps = xen_host_pci_dev_has_pcie_ext_caps(d); + /* read and store PCIe Capabilities field for later use */ + pcie_cap_pos = xen_host_pci_find_next_cap(d, 0, PCI_CAP_ID_EXP); + + if (pcie_cap_pos) { + if (xen_host_pci_get_word(d, pcie_cap_pos + PCI_EXP_FLAGS, + &d->pcie_flags)) { + error_setg(errp, "Unable to read from PCI Express capability " + "structure at 0x%x", pcie_cap_pos); + goto error; + } + } else { + d->pcie_flags = 0xFFFF; + } + return; error: diff --git a/hw/xen/xen-host-pci-device.h b/hw/xen/xen-host-pci-device.h index 37c5614a24..2884c4b4b9 100644 --- a/hw/xen/xen-host-pci-device.h +++ b/hw/xen/xen-host-pci-device.h @@ -27,6 +27,7 @@ typedef struct XenHostPCIDevice { uint16_t device_id; uint32_t class_code; int irq; + uint16_t pcie_flags; XenHostPCIIORegion io_regions[PCI_NUM_REGIONS - 1]; XenHostPCIIORegion rom; diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c index 2b8680b112..47c8482f32 100644 --- a/hw/xen/xen_pt_config_init.c +++ b/hw/xen/xen_pt_config_init.c @@ -832,24 +832,18 @@ static XenPTRegInfo xen_pt_emu_reg_vendor[] = { * PCI Express Capability */ -static inline uint8_t get_capability_version(XenPCIPassthroughState *s, - uint32_t offset) +static inline uint8_t get_pcie_capability_version(XenPCIPassthroughState *s) { - uint8_t flag; - if (xen_host_pci_get_byte(&s->real_device, offset + PCI_EXP_FLAGS, &flag)) { - return 0; - } - return flag & PCI_EXP_FLAGS_VERS; + assert(s->real_device.pcie_flags != 0xFFFF); + + return (uint8_t) (s->real_device.pcie_flags & PCI_EXP_FLAGS_VERS); } -static inline uint8_t get_device_type(XenPCIPassthroughState *s, - uint32_t offset) +static inline uint8_t get_pcie_device_type(XenPCIPassthroughState *s) { - uint8_t flag; - if (xen_host_pci_get_byte(&s->real_device, offset + PCI_EXP_FLAGS, &flag)) { - return 0; - } - return (flag & PCI_EXP_FLAGS_TYPE) >> 4; + assert(s->real_device.pcie_flags != 0xFFFF); + + return (uint8_t) ((s->real_device.pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4); } /* initialize Link Control register */ @@ -857,8 +851,8 @@ static int xen_pt_linkctrl_reg_init(XenPCIPassthroughState *s, XenPTRegInfo *reg, uint32_t real_offset, uint32_t *data) { - uint8_t cap_ver = get_capability_version(s, real_offset - reg->offset); - uint8_t dev_type = get_device_type(s, real_offset - reg->offset); + uint8_t cap_ver = get_pcie_capability_version(s); + uint8_t dev_type = get_pcie_device_type(s); /* no need to initialize in case of Root Complex Integrated Endpoint * with cap_ver 1.x @@ -875,7 +869,7 @@ static int xen_pt_devctrl2_reg_init(XenPCIPassthroughState *s, XenPTRegInfo *reg, uint32_t real_offset, uint32_t *data) { - uint8_t cap_ver = get_capability_version(s, real_offset - reg->offset); + uint8_t cap_ver = get_pcie_capability_version(s); /* no need to initialize in case of cap_ver 1.x */ if (cap_ver == 1) { @@ -890,7 +884,7 @@ static int xen_pt_linkctrl2_reg_init(XenPCIPassthroughState *s, XenPTRegInfo *reg, uint32_t real_offset, uint32_t *data) { - uint8_t cap_ver = get_capability_version(s, real_offset - reg->offset); + uint8_t cap_ver = get_pcie_capability_version(s); uint32_t reg_field = 0; /* no need to initialize in case of cap_ver 1.x */ @@ -1590,8 +1584,8 @@ static int xen_pt_pcie_size_init(XenPCIPassthroughState *s, uint32_t base_offset, uint8_t *size) { PCIDevice *d = PCI_DEVICE(s); - uint8_t version = get_capability_version(s, base_offset); - uint8_t type = get_device_type(s, base_offset); + uint8_t version = get_pcie_capability_version(s); + uint8_t type = get_pcie_device_type(s); uint8_t pcie_size = 0;