diff mbox series

[4/8] Skip NaN mode check for soft-float

Message ID PA4PR09MB4864BC65090CB019679B6F9A846B2@PA4PR09MB4864.eurprd09.prod.outlook.com
State New
Headers show
Series [1/8] Add CP0 MemoryMapID register implementation | expand

Commit Message

Aleksandar Rakic Sept. 27, 2024, 12:05 p.m. UTC 
Skip NaN mode check for soft-float.

Cherry-picked 63492a56485f6b755fccf7ad623f7a189bfc79b6
from https://github.com/MIPS/gnutools-qemu

Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
---
 linux-user/mips/cpu_loop.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Peter Maydell Sept. 27, 2024, 1:35 p.m. UTC | #1 
On Fri, 27 Sept 2024 at 14:27, Aleksandar Rakic
<aleksandar.rakic@htecgroup.com> wrote:
>
> Skip NaN mode check for soft-float.
>
> Cherry-picked 63492a56485f6b755fccf7ad623f7a189bfc79b6
> from https://github.com/MIPS/gnutools-qemu

Please could you provide proper commit messages that
justify why the change is being made? "We got it from
this other fork" isn't sufficient -- somebody reading the
main QEMU git history should be able to understand the
rationale for a change by looking at the commit message.

thanks
-- PMM
diff mbox series

Patch

diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
index 462387a073..07c1ebe287 100644
--- a/linux-user/mips/cpu_loop.c
+++ b/linux-user/mips/cpu_loop.c
@@ -304,8 +304,10 @@  void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
     if (env->insn_flags & ISA_NANOMIPS32) {
         return;
     }
-    if (((info->elf_flags & EF_MIPS_NAN2008) != 0) !=
-        ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) {
+    if (info->fp_abi != MIPS_ABI_FP_SOFT
+        && ((info->elf_flags & EF_MIPS_NAN2008) != 0) !=
+           ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0))
+      {
         if ((env->active_fpu.fcr31_rw_bitmask &
               (1 << FCR31_NAN2008)) == 0) {
             fprintf(stderr, "ELF binary's NaN mode not supported by CPU\n");