From patchwork Wed Oct 21 10:18:08 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Juha.Riihimaki@nokia.com X-Patchwork-Id: 36521 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 025FDB6F2B for ; Wed, 21 Oct 2009 21:32:33 +1100 (EST) Received: from localhost ([127.0.0.1]:46196 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N0YUY-0002ye-7I for incoming@patchwork.ozlabs.org; Wed, 21 Oct 2009 06:32:30 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N0YGd-0006NA-0u for qemu-devel@nongnu.org; Wed, 21 Oct 2009 06:18:07 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N0YGX-0006Ju-G5 for qemu-devel@nongnu.org; Wed, 21 Oct 2009 06:18:05 -0400 Received: from [199.232.76.173] (port=43279 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N0YGX-0006JW-4r for qemu-devel@nongnu.org; Wed, 21 Oct 2009 06:18:01 -0400 Received: from smtp.nokia.com ([192.100.122.233]:27354 helo=mgw-mx06.nokia.com) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1N0YGW-0000WZ-Cv for qemu-devel@nongnu.org; Wed, 21 Oct 2009 06:18:01 -0400 Received: from esebh105.NOE.Nokia.com (esebh105.ntc.nokia.com [172.21.138.211]) by mgw-mx06.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id n9LAHsK9013348 for ; Wed, 21 Oct 2009 13:17:57 +0300 Received: from esebh102.NOE.Nokia.com ([172.21.138.183]) by esebh105.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 21 Oct 2009 13:17:55 +0300 Received: from smtp.mgd.nokia.com ([65.54.30.7]) by esebh102.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 21 Oct 2009 13:17:54 +0300 Received: from NOK-EUMSG-05.mgdnok.nokia.com ([65.54.30.90]) by nok-am1mhub-03.mgdnok.nokia.com ([65.54.30.7]) with mapi; Wed, 21 Oct 2009 12:17:53 +0200 From: To: Date: Wed, 21 Oct 2009 12:18:08 +0200 Thread-Topic: [PATCH 10/12] target-arm: replace tcg_gen_rori_i32 by tcg_gen_rotri_i32 Thread-Index: AcpSN8BAds/5bfu+T5S4PT0U0QAJZQ== Message-ID: Accept-Language: en, en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: acceptlanguage: en, en-US MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2009 10:17:54.0605 (UTC) FILETIME=[C0DFC5D0:01CA5237] X-Nokia-AV: Clean X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 1) Subject: [Qemu-devel] [PATCH 10/12] target-arm: replace tcg_gen_rori_i32 by tcg_gen_rotri_i32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use native rotation if possible instead of a simulated one. From: Filip Navara Signed-off-by: Juha Riihimäki Acked-by: Laurent Desnogues --- TCGv tmp = new_tmp(); @@ -484,7 +469,7 @@ static inline void gen_arm_shift_im(TCGv var, int shiftop, int shift, int flags) if (shift != 0) { if (flags) shifter_out_im(var, shift - 1); - tcg_gen_rori_i32(var, var, shift); break; + tcg_gen_rotri_i32(var, var, shift); break; } else { TCGv tmp = load_cpu_field(CF); if (flags) @@ -6634,7 +6619,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) /* ??? In many cases it's not neccessary to do a rotate, a shift is sufficient. */ if (shift != 0) - tcg_gen_rori_i32(tmp, tmp, shift * 8); + tcg_gen_rotri_i32(tmp, tmp, shift * 8); op1 = (insn >> 20) & 7; switch (op1) { case 0: gen_sxtb16(tmp); break; @@ -7451,7 +7436,7 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1) /* ??? In many cases it's not neccessary to do a rotate, a shift is sufficient. */ if (shift != 0) - tcg_gen_rori_i32(tmp, tmp, shift * 8); + tcg_gen_rotri_i32(tmp, tmp, shift * 8); op = (insn >> 20) & 7; switch (op) { case 0: gen_sxth(tmp); break; diff --git a/target-arm/translate.c b/target-arm/translate.c index 99a9ffd..1734fae 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -418,21 +418,6 @@ static inline void tcg_gen_bic_i32(TCGv dest, TCGv t0, TCGv t1) /* FIXME: Implement this natively. */ #define tcg_gen_abs_i32(t0, t1) gen_helper_abs(t0, t1) -/* FIXME: Implement this natively. */ -static void tcg_gen_rori_i32(TCGv t0, TCGv t1, int i) -{ - TCGv tmp; - - if (i == 0) - return; - - tmp = new_tmp(); - tcg_gen_shri_i32(tmp, t1, i); - tcg_gen_shli_i32(t1, t1, 32 - i); - tcg_gen_or_i32(t0, t1, tmp); - dead_tmp(tmp); -} - static void shifter_out_im(TCGv var, int shift) {