From patchwork Sun Oct 4 11:12:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chen Gang X-Patchwork-Id: 526097 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id C792B1402B4 for ; Sun, 4 Oct 2015 22:13:04 +1100 (AEDT) Received: from localhost ([::1]:42065 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZihDy-0002C9-QP for incoming@patchwork.ozlabs.org; Sun, 04 Oct 2015 07:13:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58115) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZihDY-0001n2-Si for qemu-devel@nongnu.org; Sun, 04 Oct 2015 07:12:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZihDR-0002vG-DC for qemu-devel@nongnu.org; Sun, 04 Oct 2015 07:12:36 -0400 Received: from col004-omc2s17.hotmail.com ([65.55.34.91]:58145) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZihDR-0002uy-5o for qemu-devel@nongnu.org; Sun, 04 Oct 2015 07:12:29 -0400 Received: from COL130-W51 ([65.55.34.73]) by COL004-OMC2S17.hotmail.com over TLS secured channel with Microsoft SMTPSVC(7.5.7601.23008); Sun, 4 Oct 2015 04:12:28 -0700 X-TMN: [k0/UocNo6b6w6VQV50EoAs+6FV0YcgOe] X-Originating-Email: [xili_gchen_5257@hotmail.com] Message-ID: From: Chen Gang To: "rth@twiddle.net" , Peter Maydell , Chris Metcalf Date: Sun, 4 Oct 2015 19:12:28 +0800 Importance: Normal MIME-Version: 1.0 X-OriginalArrivalTime: 04 Oct 2015 11:12:28.0666 (UTC) FILETIME=[8E6A55A0:01D0FE95] X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 65.55.34.91 Cc: qemu-devel Subject: [Qemu-devel] [PATCH v2] target-tilegx: Implement v2mults instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From 298aa5e9be6373fea7b30236bd3e90352c6e693a Mon Sep 17 00:00:00 2001 From: Chen Gang Date: Sat, 3 Oct 2015 10:42:01 +0800 Subject: [PATCH v2] target-tilegx: Implement v2mults instruction Just according to v1multu instruction implementation. Signed-off-by: Chen Gang ---  target-tilegx/helper.h      |  1 +  target-tilegx/simd_helper.c | 13 +++++++++++++  target-tilegx/translate.c   |  4 ++++  3 files changed, 18 insertions(+) --  1.9.3 diff --git a/target-tilegx/helper.h b/target-tilegx/helper.h index c58ee20..bbcc476 100644 --- a/target-tilegx/helper.h +++ b/target-tilegx/helper.h @@ -16,6 +16,7 @@ DEF_HELPER_FLAGS_2(v2int_h, TCG_CALL_NO_RWG_SE, i64, i64, i64)  DEF_HELPER_FLAGS_2(v2int_l, TCG_CALL_NO_RWG_SE, i64, i64, i64)    DEF_HELPER_FLAGS_2(v1multu, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(v2mults, TCG_CALL_NO_RWG_SE, i64, i64, i64)  DEF_HELPER_FLAGS_2(v1shl, TCG_CALL_NO_RWG_SE, i64, i64, i64)  DEF_HELPER_FLAGS_2(v1shru, TCG_CALL_NO_RWG_SE, i64, i64, i64)  DEF_HELPER_FLAGS_2(v1shrs, TCG_CALL_NO_RWG_SE, i64, i64, i64) diff --git a/target-tilegx/simd_helper.c b/target-tilegx/simd_helper.c index 6fa6318..4f226eb 100644 --- a/target-tilegx/simd_helper.c +++ b/target-tilegx/simd_helper.c @@ -41,6 +41,19 @@ uint64_t helper_v1multu(uint64_t a, uint64_t b)      return r;  }   +uint64_t helper_v2mults(uint64_t a, uint64_t b) +{ +    uint64_t r = 0; +    int i; + +    for (i = 0; i < 64; i += 16) { +        int64_t ae = (int16_t)(a>> i); +        int64_t be = (int16_t)(b>> i); +        r |= ((ae * be) & 0xffff) << i; +    } +    return r; +} +  uint64_t helper_v1shl(uint64_t a, uint64_t b)  {      uint64_t m; diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 034cbc2..eb2d0b1 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -1355,7 +1355,11 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,      case OE_RRR(V2MNZ, 0, X1):      case OE_RRR(V2MULFSC, 0, X0):      case OE_RRR(V2MULS, 0, X0): +        return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;      case OE_RRR(V2MULTS, 0, X0): +        gen_helper_v2mults(tdest, tsrca, tsrcb); +        mnemonic = "v2mults"; +        break;      case OE_RRR(V2MZ, 0, X0):      case OE_RRR(V2MZ, 0, X1):      case OE_RRR(V2PACKH, 0, X0):