diff mbox

[08/15] piix: convert to pci_bar_map

Message ID AANLkTinpl_UCbyBVXY3SI05mB83ih-kSaPuudvrQLrXD@mail.gmail.com
State New
Headers show

Commit Message

Blue Swirl July 12, 2010, 6:41 p.m. UTC 
Use pci_bar_map() instead of a mapping function.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---
 hw/ide/piix.c |   72 +++++++++++++++++++++++++++++++++++---------------------
 1 files changed, 45 insertions(+), 27 deletions(-)

 {
@@ -119,13 +122,28 @@ static void piix3_reset(void *opaque)
 static int pci_piix_ide_initfn(PCIIDEState *d)
 {
     uint8_t *pci_conf = d->dev.config;
+    unsigned int i;
+    int io_index;

     pci_conf[PCI_CLASS_PROG] = 0x80; // legacy ATA mode
     pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);

     qemu_register_reset(piix3_reset, d);

-    pci_register_bar(&d->dev, 4, 0x10, PCI_BASE_ADDRESS_SPACE_IO, bmdma_map);
+    pci_register_bar(&d->dev, 4, 0x10, PCI_BASE_ADDRESS_SPACE_IO, NULL);
+    for (i = 0; i < 2; i++) {
+        BMDMAState *bm = &d->bmdma[i];
+
+        d->bus[i].bmdma = bm;
+        bm->bus = d->bus + i;
+        qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
+        io_index = cpu_register_io(bmdma_io_reads, bmdma_cmd_io_writes, 1, bm);
+        pci_bar_map(&d->dev, 4, i * 3 + 0, i * 8 + 0, 1, io_index);
+        io_index = cpu_register_io(bmdma_io_reads, bmdma_io_writes, 3, bm);
+        pci_bar_map(&d->dev, 4, i * 3 + 1, i * 8 + 1, 3, io_index);
+        io_index = cpu_register_io(bmdma_addr_reads, bmdma_addr_writes, 4, bm);
+        pci_bar_map(&d->dev, 4, i * 3 + 2, i * 8 + 4, 4, io_index);
+    }

     vmstate_register(&d->dev.qdev, 0, &vmstate_ide_pci, d);
diff mbox

Patch

diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 07483e8..959e061 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -68,32 +68,35 @@  static void bmdma_writeb(void *opaque, uint32_t
addr, uint32_t val)
     }
 }

-static void bmdma_map(PCIDevice *pci_dev, int region_num,
-                    pcibus_t addr, pcibus_t size, int type)
-{
-    PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, pci_dev);
-    int i;
+static IOPortWriteFunc * const bmdma_cmd_io_writes[] = {
+    bmdma_cmd_writeb,
+    NULL,
+    NULL,
+};

-    for(i = 0;i < 2; i++) {
-        BMDMAState *bm = &d->bmdma[i];
-        d->bus[i].bmdma = bm;
-        bm->bus = d->bus+i;
-        qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
+static IOPortWriteFunc * const bmdma_io_writes[] = {
+    bmdma_writeb,
+    NULL,
+    NULL,
+};

-        register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm);
+static IOPortReadFunc * const bmdma_io_reads[] = {
+    bmdma_readb,
+    NULL,
+    NULL,
+};

-        register_ioport_write(addr + 1, 3, 1, bmdma_writeb, bm);
-        register_ioport_read(addr, 4, 1, bmdma_readb, bm);
+static IOPortWriteFunc * const bmdma_addr_writes[] = {
+    bmdma_addr_writeb,
+    bmdma_addr_writew,
+    bmdma_addr_writel,
+};

-        register_ioport_write(addr + 4, 4, 1, bmdma_addr_writeb, bm);
-        register_ioport_read(addr + 4, 4, 1, bmdma_addr_readb, bm);
-        register_ioport_write(addr + 4, 4, 2, bmdma_addr_writew, bm);
-        register_ioport_read(addr + 4, 4, 2, bmdma_addr_readw, bm);
-        register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm);
-        register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm);
-        addr += 8;
-    }
-}
+static IOPortReadFunc * const bmdma_addr_reads[] = {
+    bmdma_addr_readb,
+    bmdma_addr_readw,
+    bmdma_addr_readl,
+};

 static void piix3_reset(void *opaque)