From patchwork Fri Mar 2 06:59:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yang Z" X-Patchwork-Id: 144143 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D904EB6F62 for ; Fri, 2 Mar 2012 18:02:15 +1100 (EST) Received: from localhost ([::1]:39056 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3MVJ-0001lI-ME for incoming@patchwork.ozlabs.org; Fri, 02 Mar 2012 02:02:13 -0500 Received: from eggs.gnu.org ([208.118.235.92]:55493) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3MV5-0001cZ-6w for qemu-devel@nongnu.org; Fri, 02 Mar 2012 02:02:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S3MV0-0007op-CW for qemu-devel@nongnu.org; Fri, 02 Mar 2012 02:01:58 -0500 Received: from mga09.intel.com ([134.134.136.24]:48862) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3MV0-0007o5-6e for qemu-devel@nongnu.org; Fri, 02 Mar 2012 02:01:54 -0500 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 01 Mar 2012 23:01:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.67,352,1309762800"; d="scan'208";a="113740040" Received: from pgsmsx101.gar.corp.intel.com ([10.221.44.78]) by orsmga001.jf.intel.com with ESMTP; 01 Mar 2012 23:00:49 -0800 Received: from pgsmsx151.gar.corp.intel.com (172.30.236.41) by PGSMSX101.gar.corp.intel.com (10.221.44.78) with Microsoft SMTP Server (TLS) id 14.1.355.2; Fri, 2 Mar 2012 14:59:42 +0800 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by PGSMSX151.gar.corp.intel.com (172.30.236.41) with Microsoft SMTP Server (TLS) id 14.1.355.2; Fri, 2 Mar 2012 14:59:42 +0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.142]) by SHSMSX102.ccr.corp.intel.com ([169.254.2.36]) with mapi id 14.01.0355.002; Fri, 2 Mar 2012 14:59:41 +0800 From: "Zhang, Yang Z" To: "qemu-devel@nongnu.org" Thread-Topic: [PATCH v3 3/7] RTC: Add UIP(update in progress) check logic Thread-Index: Acz4QghsN8xNmwzAQnyPeYxOIiZxVQ== Date: Fri, 2 Mar 2012 06:59:40 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.24 Cc: Paolo Bonzini , "aliguori@us.ibm.com" , Marcelo Tosatti , Jan Kiszka , "kvm@vger.kernel.org" Subject: [Qemu-devel] [PATCH v3 3/7] RTC: Add UIP(update in progress) check logic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The UIP(update in progress) is set when RTC is updating. And the update cycle begins 244us later after UIP is set. And it is cleared when update end. . Signed-off-by: Yang Zhang --- hw/mc146818rtc.c | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-) -- 1.7.1 diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index 82a5b8a..6ebb8f6 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -377,6 +377,21 @@ static void rtc_calibrate_time(RTCState *s) s->current_tm = *ret; } +static int update_in_progress(RTCState *s) +{ + int64_t guest_usec; + + if (s->cmos_data[RTC_REG_B] & REG_B_SET) { + return 0; + } + guest_usec = get_guest_rtc_us(s); + /* UIP bit will be set at last 244us of every second. */ + if ((guest_usec % USEC_PER_SEC) >= (USEC_PER_SEC - 244)) { + return 1; + } + return 0; +} + static uint32_t cmos_ioport_read(void *opaque, uint32_t addr) { RTCState *s = opaque; @@ -402,6 +417,9 @@ static uint32_t cmos_ioport_read(void *opaque, uint32_t addr) break; case RTC_REG_A: ret = s->cmos_data[s->cmos_index]; + if (update_in_progress(s)) { + ret |= REG_A_UIP; + } break; case RTC_REG_C: ret = s->cmos_data[s->cmos_index];