From patchwork Fri Mar 2 06:59:04 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yang Z" X-Patchwork-Id: 144140 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A8CE2B6ED0 for ; Fri, 2 Mar 2012 18:00:49 +1100 (EST) Received: from localhost ([::1]:35785 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3MTv-0008Rr-KB for incoming@patchwork.ozlabs.org; Fri, 02 Mar 2012 02:00:47 -0500 Received: from eggs.gnu.org ([208.118.235.92]:55088) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3MTi-0008RX-PF for qemu-devel@nongnu.org; Fri, 02 Mar 2012 02:00:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S3MTb-0007X4-50 for qemu-devel@nongnu.org; Fri, 02 Mar 2012 02:00:34 -0500 Received: from mga03.intel.com ([143.182.124.21]:9497) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3MTa-0007Wh-Ug for qemu-devel@nongnu.org; Fri, 02 Mar 2012 02:00:27 -0500 Received: from azsmga002.ch.intel.com ([10.2.17.35]) by azsmga101.ch.intel.com with ESMTP; 01 Mar 2012 23:00:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.71,315,1320652800"; d="scan'208";a="72669573" Received: from pgsmsx102.gar.corp.intel.com ([10.221.44.80]) by AZSMGA002.ch.intel.com with ESMTP; 01 Mar 2012 23:00:22 -0800 Received: from pgsmsx152.gar.corp.intel.com (172.30.236.43) by PGSMSX102.gar.corp.intel.com (10.221.44.80) with Microsoft SMTP Server (TLS) id 14.1.355.2; Fri, 2 Mar 2012 14:59:06 +0800 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by PGSMSX152.gar.corp.intel.com (172.30.236.43) with Microsoft SMTP Server (TLS) id 14.1.355.2; Fri, 2 Mar 2012 14:59:05 +0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.142]) by SHSMSX102.ccr.corp.intel.com ([169.254.2.36]) with mapi id 14.01.0355.002; Fri, 2 Mar 2012 14:59:04 +0800 From: "Zhang, Yang Z" To: "qemu-devel@nongnu.org" Thread-Topic: [PATCH v3 1/7] RTC: Remove the logic to update time format when DM bit changed Thread-Index: Acz4QfKXn6XUSvNHTBe7DkGOeQh/DQ== Date: Fri, 2 Mar 2012 06:59:04 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 143.182.124.21 Cc: Paolo Bonzini , "aliguori@us.ibm.com" , Marcelo Tosatti , Jan Kiszka , "kvm@vger.kernel.org" Subject: [Qemu-devel] [PATCH v3 1/7] RTC: Remove the logic to update time format when DM bit changed X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Change DM(date mode) and 24/12 control bit don't affect the internal registers. It only indicates what format is using for those registers. So we don't need to update time format when it is modified. Signed-off-by: Yang Zhang Signed-off-by: Aurelien Jarno --- hw/mc146818rtc.c | 10 +--------- 1 files changed, 1 insertions(+), 9 deletions(-) -- 1.7.1 diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index a46fdfc..9b49cbc 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -252,15 +252,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data) rtc_set_time(s); } } - if (((s->cmos_data[RTC_REG_B] ^ data) & (REG_B_DM | REG_B_24H)) && - !(data & REG_B_SET)) { - /* If the time format has changed and not in set mode, - update the registers immediately. */ - s->cmos_data[RTC_REG_B] = data; - rtc_copy_date(s); - } else { - s->cmos_data[RTC_REG_B] = data; - } + s->cmos_data[RTC_REG_B] = data; rtc_timer_update(s, qemu_get_clock_ns(rtc_clock)); break; case RTC_REG_C: