From patchwork Fri May 20 12:39:32 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirill Batuzov X-Patchwork-Id: 96591 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EEF05B719D for ; Fri, 20 May 2011 22:40:29 +1000 (EST) Received: from localhost ([::1]:50162 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QNP0F-0006l7-CB for incoming@patchwork.ozlabs.org; Fri, 20 May 2011 08:40:27 -0400 Received: from eggs.gnu.org ([140.186.70.92]:44774) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QNOzi-0006bd-9E for qemu-devel@nongnu.org; Fri, 20 May 2011 08:39:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QNOzh-0003Zd-Av for qemu-devel@nongnu.org; Fri, 20 May 2011 08:39:54 -0400 Received: from smtp.ispras.ru ([83.149.198.202]:55473) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QNOzg-0003ZJ-P4 for qemu-devel@nongnu.org; Fri, 20 May 2011 08:39:53 -0400 Received: from bulbul.intra.ispras.ru (winnie.ispras.ru [83.149.198.236]) by smtp.ispras.ru (Postfix) with ESMTP id 0E1445D411A; Fri, 20 May 2011 16:36:09 +0400 (MSD) From: Kirill Batuzov To: qemu-devel@nongnu.org Date: Fri, 20 May 2011 16:39:32 +0400 Message-Id: <97bbf40c055a9949f5fbf185764792679fb8273a.1305889001.git.batuzovk@ispras.ru> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 83.149.198.202 Cc: mj.mccormack@samsung.com, zhur@ispras.ru Subject: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Perform constant forlding for SHR, SHL, SAR, ROTR, ROTL operations. Signed-off-by: Kirill Batuzov --- tcg/optimize.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 87 insertions(+), 0 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index a02d5c1..b6b0dc4 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -99,6 +99,11 @@ static int op_bits(int op) case INDEX_op_and_i32: case INDEX_op_or_i32: case INDEX_op_xor_i32: + case INDEX_op_shl_i32: + case INDEX_op_shr_i32: + case INDEX_op_sar_i32: + case INDEX_op_rotl_i32: + case INDEX_op_rotr_i32: return 32; #if TCG_TARGET_REG_BITS == 64 case INDEX_op_mov_i64: @@ -108,6 +113,11 @@ static int op_bits(int op) case INDEX_op_and_i64: case INDEX_op_or_i64: case INDEX_op_xor_i64: + case INDEX_op_shl_i64: + case INDEX_op_shr_i64: + case INDEX_op_sar_i64: + case INDEX_op_rotl_i64: + case INDEX_op_rotr_i64: return 64; #endif default: @@ -131,6 +141,7 @@ static int op_to_movi(int op) static TCGArg do_constant_folding_2(int op, TCGArg x, TCGArg y) { + TCGArg r; switch (op) { case INDEX_op_add_i32: #if TCG_TARGET_REG_BITS == 64 @@ -168,6 +179,72 @@ static TCGArg do_constant_folding_2(int op, TCGArg x, TCGArg y) #endif return x ^ y; + case INDEX_op_shl_i32: +#if TCG_TARGET_REG_BITS == 64 + y &= 0xffffffff; + case INDEX_op_shl_i64: +#endif + return x << y; + + case INDEX_op_shr_i32: +#if TCG_TARGET_REG_BITS == 64 + x &= 0xffffffff; + y &= 0xffffffff; + case INDEX_op_shr_i64: +#endif + /* Assuming TCGArg to be unsigned */ + return x >> y; + + case INDEX_op_sar_i32: +#if TCG_TARGET_REG_BITS == 64 + x &= 0xffffffff; + y &= 0xffffffff; +#endif + r = x & 0x80000000; + x &= ~0x80000000; + x >>= y; + r |= r - (r >> y); + x |= r; + return x; + +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_sar_i64: + r = x & 0x8000000000000000ULL; + x &= ~0x8000000000000000ULL; + x >>= y; + r |= r - (r >> y); + x |= r; + return x; +#endif + + case INDEX_op_rotr_i32: +#if TCG_TARGET_REG_BITS == 64 + x &= 0xffffffff; + y &= 0xffffffff; +#endif + x = (x << (32 - y)) | (x >> y); + return x; + +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_rotr_i64: + x = (x << (64 - y)) | (x >> y); + return x; +#endif + + case INDEX_op_rotl_i32: +#if TCG_TARGET_REG_BITS == 64 + x &= 0xffffffff; + y &= 0xffffffff; +#endif + x = (x << y) | (x >> (32 - y)); + return x; + +#if TCG_TARGET_REG_BITS == 64 + case INDEX_op_rotl_i64: + x = (x << y) | (x >> (64 - y)); + return x; +#endif + default: fprintf(stderr, "Unrecognized operation %d in do_constant_folding.\n", op); @@ -297,11 +374,21 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, case INDEX_op_add_i32: case INDEX_op_sub_i32: case INDEX_op_mul_i32: + case INDEX_op_shl_i32: + case INDEX_op_shr_i32: + case INDEX_op_sar_i32: + case INDEX_op_rotl_i32: + case INDEX_op_rotr_i32: #if TCG_TARGET_REG_BITS == 64 case INDEX_op_xor_i64: case INDEX_op_add_i64: case INDEX_op_sub_i64: case INDEX_op_mul_i64: + case INDEX_op_shl_i64: + case INDEX_op_shr_i64: + case INDEX_op_sar_i64: + case INDEX_op_rotl_i64: + case INDEX_op_rotr_i64: #endif if (state[args[1]] == TCG_TEMP_CONST && state[args[2]] == TCG_TEMP_CONST) {