Message ID | 96bfa9b8d822c77e600c3d5b5ded500593ba5057.1454545837.git.alistair.francis@xilinx.com |
---|---|
State | New |
Headers | show |
On Thu, Feb 4, 2016 at 10:34 AM, Alistair Francis <alistair.francis@xilinx.com> wrote: > Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Nathan Rossi <nathan@nathanrossi.com> > --- > > target-arm/helper.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 2e0018c..c3fa57d 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -1031,6 +1031,13 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { > .accessfn = pmreg_access, > .writefn = pmovsr_write, > .raw_writefn = raw_write }, > + { .name = "PMOVSCLR_EL0", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 3, .crn = 9, .crm = 12, .opc2 = 3, > + .access = PL0_RW, .accessfn = pmreg_access, > + .type = ARM_CP_ALIAS, > + .fieldoffset = offsetof(CPUARMState, cp15.c9_pmovsr), > + .writefn = pmovsr_write, > + .raw_writefn = raw_write }, > /* Unimplemented so WI. */ > { .name = "PMSWINC", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 = 4, > .access = PL0_W, .accessfn = pmreg_access, .type = ARM_CP_NOP }, > @@ -1096,6 +1103,11 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { > .access = PL1_RW, .type = ARM_CP_ALIAS, > .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten), > .writefn = pmintenclr_write, }, > + { .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64, > + .opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2, > + .access = PL1_RW, .type = ARM_CP_ALIAS, > + .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten), > + .writefn = pmintenclr_write }, > { .name = "VBAR", .state = ARM_CP_STATE_BOTH, > .opc0 = 3, .crn = 12, .crm = 0, .opc1 = 0, .opc2 = 0, > .access = PL1_RW, .writefn = vbar_write, > -- > 2.5.0 >
diff --git a/target-arm/helper.c b/target-arm/helper.c index 2e0018c..c3fa57d 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1031,6 +1031,13 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { .accessfn = pmreg_access, .writefn = pmovsr_write, .raw_writefn = raw_write }, + { .name = "PMOVSCLR_EL0", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 3, .crn = 9, .crm = 12, .opc2 = 3, + .access = PL0_RW, .accessfn = pmreg_access, + .type = ARM_CP_ALIAS, + .fieldoffset = offsetof(CPUARMState, cp15.c9_pmovsr), + .writefn = pmovsr_write, + .raw_writefn = raw_write }, /* Unimplemented so WI. */ { .name = "PMSWINC", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 = 4, .access = PL0_W, .accessfn = pmreg_access, .type = ARM_CP_NOP }, @@ -1096,6 +1103,11 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { .access = PL1_RW, .type = ARM_CP_ALIAS, .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten), .writefn = pmintenclr_write, }, + { .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2, + .access = PL1_RW, .type = ARM_CP_ALIAS, + .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten), + .writefn = pmintenclr_write }, { .name = "VBAR", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .crn = 12, .crm = 0, .opc1 = 0, .opc2 = 0, .access = PL1_RW, .writefn = vbar_write,
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> --- target-arm/helper.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)