From patchwork Thu Oct 5 03:44:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael S. Tsirkin" X-Patchwork-Id: 1843735 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256 header.s=mimecast20190719 header.b=hAMaGO8Y; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4S1Hc42jYvz1yng for ; Thu, 5 Oct 2023 14:49:08 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qoFHu-0005tB-49; Wed, 04 Oct 2023 23:44:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qoFHa-0004rF-Gs for qemu-devel@nongnu.org; Wed, 04 Oct 2023 23:44:18 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qoFHZ-0000E2-46 for qemu-devel@nongnu.org; Wed, 04 Oct 2023 23:44:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1696477452; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=i08g2Y3CGAaSjKQp/C/ixb+I7WFjEj9qgGznvzU8bM4=; b=hAMaGO8YpLHm3Aya20474NcXr1fbBzTU/vekHcItsEcbIfkbp64luUOmJDISrqYgQjDQgs AwIbt9CMgDxL0z0LC9Ims4++r+uprxGTu5b9VuXdTvZUXqU9qP3mpyG4mzsHPkl5rYKF04 aor+lSM2mr/M5XjfOUnXxAQfs6bscNY= Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-70-GRg5-Z0hP1-CtB6q-3qDqg-1; Wed, 04 Oct 2023 23:44:05 -0400 X-MC-Unique: GRg5-Z0hP1-CtB6q-3qDqg-1 Received: by mail-wm1-f70.google.com with SMTP id 5b1f17b1804b1-3fe1521678fso3817195e9.1 for ; Wed, 04 Oct 2023 20:44:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696477444; x=1697082244; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=i08g2Y3CGAaSjKQp/C/ixb+I7WFjEj9qgGznvzU8bM4=; b=IRtxqzZ8A21WTXi2RCesvcvXSdvdBt/ipLGT2jBkbFkX1o3tuBglBwFvEpZt25z5hK bE5i15cgLjKjrgKDa9hODNo61ULmgBmZoRIctbzyp+QWyuG5N5uxjU+7faVg5JA/Q7aW 5UAofj62tsQ6kqDnjeMHZnptJ0QTAmp2A4AT0sMgGdEN+uBCX/D6ungagXRTh2BFadvA E1n9+VLPn2vbYH5OlmnG5pWjNKnYdtcA5Hb8k+Nw0ct0VXKwAQXYBd3XtT2X0VXHLDcs /77lutlnXDnWiL8+ULwTyG/IPbw/JsFohfJe5rnW0iu5jpi6qI6BjSo9xgC461EA2H3E m3sQ== X-Gm-Message-State: AOJu0YwWmHUGRDaDsWsQ4UzvCemmSloUr+aT7v1/f/H65DSslUi1zzoh gCBBcVrhpRH/41HHYSIGAAc1atTpnwsqFRisutyOlvO5zVeGiKEkFgaAmctwpaY0kdWGfJSygvI t9J6XhJlVfLk4wwNWmqlwnP+zxGCHCL9TLG4+g9GsnXJT1lWvVIkDKxz6RAwTN0uzVh08 X-Received: by 2002:a05:600c:21d5:b0:3fe:5501:d284 with SMTP id x21-20020a05600c21d500b003fe5501d284mr4164791wmj.11.1696477443865; Wed, 04 Oct 2023 20:44:03 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHsKpVIVnrxh6H+LdzE/Zqc7KSYb/JdrXTo/GHIVFmHqMpL1lknkU4tTHiW4hWoQ2yrf2tYBA== X-Received: by 2002:a05:600c:21d5:b0:3fe:5501:d284 with SMTP id x21-20020a05600c21d500b003fe5501d284mr4164781wmj.11.1696477443554; Wed, 04 Oct 2023 20:44:03 -0700 (PDT) Received: from redhat.com ([2.52.137.96]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c230100b0040644e699a0sm2775561wmo.45.2023.10.04.20.44.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Oct 2023 20:44:02 -0700 (PDT) Date: Wed, 4 Oct 2023 23:44:00 -0400 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , David Woodhouse , Marcel Apfelbaum Subject: [PULL v2 24/53] hw/isa/ich9: Add comment on imperfect emulation of PIC vs. I/O APIC routing Message-ID: <886e0a5f31bf3d40dd8d9199674a4bad64942fde.1696477105.git.mst@redhat.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: David Woodhouse As noted in the comment, the PCI INTx lines are supposed to be routed to *both* the PIC and the I/O APIC. It's just that we don't cope with the concept of an IRQ being asserted to two *different* pins on the two irqchips. So we have this hack of routing to I/O APIC only if the PIRQ routing to the PIC is disabled. Which seems to work well enough, even when I try hard to break it with kexec. But should be explicitly documented and understood. Signed-off-by: David Woodhouse Message-Id: <112a09643b8191c4eae7d92fa247a861ab90a9ee.camel@infradead.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/isa/lpc_ich9.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 9c47a2f6c7..bce487ac4e 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -304,6 +304,21 @@ static PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin) route.irq = -1; } } else { + /* + * Strictly speaking, this is wrong. The PIRQ should be routed + * to *both* the I/O APIC and the PIC, on different pins. The + * I/O APIC has a fixed mapping to IRQ16-23, while the PIC is + * routed according to the PIRQx_ROUT configuration. But QEMU + * doesn't (yet) cope with the concept of pin numbers differing + * between PIC and I/O APIC, and neither does the in-kernel KVM + * irqchip support. So we route to the I/O APIC *only* if the + * routing to the PIC is disabled in the PIRQx_ROUT settings. + * + * This seems to work even if we boot a Linux guest with 'noapic' + * to make it use the legacy PIC, and then kexec directly into a + * new kernel which uses the I/O APIC. The new kernel explicitly + * disables the PIRQ routing even though it doesn't need to care. + */ route.irq = ich9_pirq_to_gsi(pirq_pin); }