From patchwork Wed Jun 14 21:34:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1795087 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QhJc12tyqz20Wy for ; Thu, 15 Jun 2023 07:34:57 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q9Y8D-0004c0-3H; Wed, 14 Jun 2023 17:34:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q9Y8A-0004W0-EA; Wed, 14 Jun 2023 17:34:18 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q9Y88-0003nW-J2; Wed, 14 Jun 2023 17:34:18 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 34EF0748A5B; Wed, 14 Jun 2023 23:34:10 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 0E742748A4D; Wed, 14 Jun 2023 23:34:10 +0200 (CEST) Message-Id: <78ecd505a8b523e236cbeab335aa0621f7834cc5.1686776990.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v2 05/10] target/ppc: Change parameter of cpu_interrupt_exittb() to an env pointer MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: clg@kaod.org, Greg Kurz , Daniel Henrique Barboza , Nicholas Piggin Date: Wed, 14 Jun 2023 23:34:10 +0200 (CEST) X-Spam-Probability: 8% Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Changing the parameter of cpu_interrupt_exittb() from CPUState to env allows removing some more local CPUState variables in callers. Signed-off-by: BALATON Zoltan --- target/ppc/excp_helper.c | 9 +++------ target/ppc/helper_regs.c | 15 ++++++--------- target/ppc/helper_regs.h | 2 +- 3 files changed, 10 insertions(+), 16 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 122e2a6e41..49ed3e1825 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -419,7 +419,7 @@ static void powerpc_mcheck_checkstop(CPUPPCState *env) "Entering checkstop state\n"); } cs->halted = 1; - cpu_interrupt_exittb(cs); + cpu_interrupt_exittb(env); } static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) @@ -2551,8 +2551,7 @@ void helper_store_msr(CPUPPCState *env, target_ulong val) uint32_t excp = hreg_store_msr(env, val, 0); if (excp != 0) { - CPUState *cs = env_cpu(env); - cpu_interrupt_exittb(cs); + cpu_interrupt_exittb(env); raise_exception(env, excp); } } @@ -2589,8 +2588,6 @@ void helper_pminsn(CPUPPCState *env, uint32_t insn) static void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr) { - CPUState *cs = env_cpu(env); - /* MSR:POW cannot be set by any form of rfi */ msr &= ~(1ULL << MSR_POW); @@ -2614,7 +2611,7 @@ static void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr) * No need to raise an exception here, as rfi is always the last * insn of a TB */ - cpu_interrupt_exittb(cs); + cpu_interrupt_exittb(env); /* Reset the reservation */ env->reserve_addr = -1; diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index bc7e9d7eda..ffedd38985 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -237,7 +237,7 @@ void cpu_get_tb_cpu_state(CPUPPCState *env, target_ulong *pc, } #endif -void cpu_interrupt_exittb(CPUState *cs) +void cpu_interrupt_exittb(CPUPPCState *env) { /* * We don't need to worry about translation blocks @@ -245,18 +245,14 @@ void cpu_interrupt_exittb(CPUState *cs) */ if (tcg_enabled()) { QEMU_IOTHREAD_LOCK_GUARD(); - cpu_interrupt(cs, CPU_INTERRUPT_EXITTB); + cpu_interrupt(env_cpu(env), CPU_INTERRUPT_EXITTB); } } int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv) { - int excp; -#if !defined(CONFIG_USER_ONLY) - CPUState *cs = env_cpu(env); -#endif + int excp = 0; - excp = 0; value &= env->msr_mask; #if !defined(CONFIG_USER_ONLY) /* Neither mtmsr nor guest state can alter HV */ @@ -265,12 +261,12 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv) value |= env->msr & MSR_HVB; } if ((value ^ env->msr) & (R_MSR_IR_MASK | R_MSR_DR_MASK)) { - cpu_interrupt_exittb(cs); + cpu_interrupt_exittb(env); } if ((env->mmu_model == POWERPC_MMU_BOOKE || env->mmu_model == POWERPC_MMU_BOOKE206) && ((value ^ env->msr) & R_MSR_GS_MASK)) { - cpu_interrupt_exittb(cs); + cpu_interrupt_exittb(env); } if (unlikely((env->flags & POWERPC_FLAG_TGPR) && ((value ^ env->msr) & (1 << MSR_TGPR)))) { @@ -301,6 +297,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv) if (unlikely(FIELD_EX64(env->msr, MSR, POW))) { if (!env->pending_interrupts && (*env->check_pow)(env)) { + CPUState *cs = env_cpu(env); cs->halted = 1; excp = EXCP_HALTED; } diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h index 8196c1346d..3e1606f293 100644 --- a/target/ppc/helper_regs.h +++ b/target/ppc/helper_regs.h @@ -23,7 +23,7 @@ void hreg_swap_gpr_tgpr(CPUPPCState *env); void hreg_compute_hflags(CPUPPCState *env); void hreg_update_pmu_hflags(CPUPPCState *env); -void cpu_interrupt_exittb(CPUState *cs); +void cpu_interrupt_exittb(CPUPPCState *env); int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv); #ifdef CONFIG_USER_ONLY