diff mbox

[3/4] pci: fix accesses to pci status register

Message ID 75e595594a07d0a2fe4bfb4def873a7e52bb0a64.1289555375.git.yamahata@valinux.co.jp
State New
Headers show

Commit Message

Isaku Yamahata Nov. 12, 2010, 9:51 a.m. UTC 
pci status register is 16 bit, not 8 bit.
So use helper function to manipulate status register.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pci.c |   21 +++++++++++++--------
 1 files changed, 13 insertions(+), 8 deletions(-)
diff mbox

Patch

diff --git a/hw/pci.c b/hw/pci.c
index a734e14..a16e763 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -127,9 +127,11 @@  static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change)
 static void pci_update_irq_status(PCIDevice *dev)
 {
     if (dev->irq_state) {
-        dev->config[PCI_STATUS] |= PCI_STATUS_INTERRUPT;
+        pci_word_test_and_set_mask(dev->config + PCI_STATUS,
+                                   PCI_STATUS_INTERRUPT);
     } else {
-        dev->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT;
+        pci_word_test_and_clear_mask(dev->config + PCI_STATUS,
+                                     PCI_STATUS_INTERRUPT);
     }
 }
 
@@ -413,7 +415,7 @@  void pci_device_save(PCIDevice *s, QEMUFile *f)
      * in irq_state which we are saving.
      * This makes us compatible with old devices
      * which never set or clear this bit. */
-    s->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT;
+    pci_word_test_and_clear_mask(s->config + PCI_STATUS, PCI_STATUS_INTERRUPT);
     vmstate_save_state(f, pci_get_vmstate(s), s);
     /* Restore the interrupt status bit. */
     pci_update_irq_status(s);
@@ -626,7 +628,7 @@  static void pci_init_cmask(PCIDevice *dev)
 {
     pci_set_word(dev->cmask + PCI_VENDOR_ID, 0xffff);
     pci_set_word(dev->cmask + PCI_DEVICE_ID, 0xffff);
-    dev->cmask[PCI_STATUS] = PCI_STATUS_CAP_LIST;
+    pci_set_word(dev->cmask + PCI_STATUS, PCI_STATUS_CAP_LIST);
     dev->cmask[PCI_REVISION_ID] = 0xff;
     dev->cmask[PCI_CLASS_PROG] = 0xff;
     pci_set_word(dev->cmask + PCI_CLASS_DEVICE, 0xffff);
@@ -1793,8 +1795,9 @@  static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id,
 {
     uint8_t next, prev;
 
-    if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST))
+    if (!(pci_get_word(pdev->config + PCI_STATUS) & PCI_STATUS_CAP_LIST)) {
         return 0;
+    }
 
     for (prev = PCI_CAPABILITY_LIST; (next = pdev->config[prev]);
          prev = next + PCI_CAP_LIST_NEXT)
@@ -1900,7 +1903,7 @@  int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
     config[PCI_CAP_LIST_ID] = cap_id;
     config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST];
     pdev->config[PCI_CAPABILITY_LIST] = offset;
-    pdev->config[PCI_STATUS] |= PCI_STATUS_CAP_LIST;
+    pci_word_test_and_set_mask(pdev->config + PCI_STATUS, PCI_STATUS_CAP_LIST);
     memset(pdev->used + offset, 0xFF, size);
     /* Make capability read-only by default */
     memset(pdev->wmask + offset, 0, size);
@@ -1923,8 +1926,10 @@  void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
     memset(pdev->cmask + offset, 0, size);
     memset(pdev->used + offset, 0, size);
 
-    if (!pdev->config[PCI_CAPABILITY_LIST])
-        pdev->config[PCI_STATUS] &= ~PCI_STATUS_CAP_LIST;
+    if (!pdev->config[PCI_CAPABILITY_LIST]) {
+        pci_word_test_and_clear_mask(pdev->config + PCI_STATUS,
+                                     PCI_STATUS_CAP_LIST);
+    }
 }
 
 /* Reserve space for capability at a known offset (to call after load). */