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Tue, 9 Feb 2016 22:17:44 +0000 Received: from 172-16-1-203.xilinx.com ([172.16.1.203]:35448 helo=xsj-tvapsmtp02.xilinx.com) by xsj-tvapsmtpgw01 with esmtp (Exim 4.63) (envelope-from ) id 1aTGbP-0002mv-Ux; Tue, 09 Feb 2016 14:17:43 -0800 Received: from [127.0.0.1] (port=42667 helo=tsj-smtp-dlp1.xlnx.xilinx.com) by xsj-tvapsmtp02.xilinx.com with esmtp (Exim 4.63) (envelope-from ) id 1aTGbP-0007cC-P7; Tue, 09 Feb 2016 14:17:43 -0800 Received: from xsj-tvapsmtp02 (xsj-tvapsmtp02.xilinx.com [172.16.1.203]) by tsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id u19MC3mw011645; Tue, 9 Feb 2016 14:12:03 -0800 Received: from [172.19.74.182] (port=49736 helo=xsjalistai50.xlnx.xilinx.com) by xsj-tvapsmtp02 with esmtp (Exim 4.63) (envelope-from ) id 1aTGbO-0007c9-UY; Tue, 09 Feb 2016 14:17:42 -0800 From: Alistair Francis To: , Date: Tue, 9 Feb 2016 14:15:08 -0800 Message-ID: <7217a646bf738d50584d906301c9dd8a2873b9aa.1455055858.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: References: X-RCIS-Action: ALLOW X-TM-AS-MML: disable X-TM-AS-Product-Ver: IMSS-7.1.0.1679-8.0.0.1202-22054.006 X-TM-AS-Result: No--2.972-7.0-31-10 X-imss-scan-details: No--2.972-7.0-31-10 X-TMASE-MatchedRID: yWYOB9VwmhlGlhjnipkGEBWCVBr+Ay98DiUf/hQuYYVtw+n+iKWyyMRk oeJ3OFRcFXq3kuUpln++daZEFcM/u2+sGcdbpdKcngIgpj8eDcAZ1CdBJOsoY8RB0bsfrpPIcSq bxBgG0w5DVAShqJkPRN/palwNS5nwSIg9S27WniYn62ueLH4zwTwX2IN4fQ8gtgTKrhbHiqMHTb cmwZhizMMuxQhUMa4ehmjqA5KKqPeCvqWrFsheUcLe0zBjeZrbFQOP52BRBXJMTsKj18q/fA== X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.96; 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PCL:0; RULEID:(601004)(2401047)(13018025)(13024025)(5005006)(13023025)(13017025)(8121501046)(13015025)(10201501046)(3002001); SRVR:SN1NAM02HT183; BCL:0; PCL:0; RULEID:; SRVR:SN1NAM02HT183; X-Forefront-PRVS: 08476BC6EF X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2016 22:17:44.5404 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.96]; Helo=[xsj-tvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT183 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.38.89 Cc: edgar.iglesias@xilinx.com, alistair.francis@xilinx.com, crosthwaitepeter@gmail.com, edgar.iglesias@gmail.com, alex.bennee@linaro.org, afaerber@suse.de, fred.konrad@greensocs.com Subject: [Qemu-devel] [PATCH v4 13/16] irq: Add opaque setter routine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Crosthwaite Add a routine to set or override the opaque data of an IRQ. Qdev currently always initialises IRQ opaque as the device itself. This allows you to override to a custom opaque in the case where there is extra or different data needed. Signed-off-by: Peter Crosthwaite Signed-off-by: Alistair Francis --- hw/core/irq.c | 5 +++++ include/hw/irq.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/hw/core/irq.c b/hw/core/irq.c index 49ff2e6..9d125fb 100644 --- a/hw/core/irq.c +++ b/hw/core/irq.c @@ -77,6 +77,11 @@ qemu_irq qemu_allocate_irq(qemu_irq_handler handler, void *opaque, int n) return irq; } +void qemu_irq_set_opaque(qemu_irq irq, void *opaque) +{ + irq->opaque = opaque; +} + void qemu_free_irqs(qemu_irq *s, int n) { int i; diff --git a/include/hw/irq.h b/include/hw/irq.h index 4c4c2ea..edad0fc 100644 --- a/include/hw/irq.h +++ b/include/hw/irq.h @@ -44,6 +44,8 @@ qemu_irq qemu_allocate_irq(qemu_irq_handler handler, void *opaque, int n); qemu_irq *qemu_extend_irqs(qemu_irq *old, int n_old, qemu_irq_handler handler, void *opaque, int n); +void qemu_irq_set_opaque(qemu_irq irq, void *opaque); + void qemu_free_irqs(qemu_irq *s, int n); void qemu_free_irq(qemu_irq irq);