From patchwork Tue Oct 4 14:07:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 678124 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3spLxJ4QFbz9ry7 for ; Wed, 5 Oct 2016 01:33:08 +1100 (AEDT) Received: from localhost ([::1]:43044 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1brQmF-0002v5-O7 for incoming@patchwork.ozlabs.org; Tue, 04 Oct 2016 10:33:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51484) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1brQNO-00064q-NY for qemu-devel@nongnu.org; Tue, 04 Oct 2016 10:07:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1brQNJ-0007TF-7u for qemu-devel@nongnu.org; Tue, 04 Oct 2016 10:07:21 -0400 Received: from 2.mo2.mail-out.ovh.net ([188.165.53.149]:35381) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1brQNI-0007Sb-UX for qemu-devel@nongnu.org; Tue, 04 Oct 2016 10:07:17 -0400 Received: from player728.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id 8C17BF9C7 for ; Tue, 4 Oct 2016 16:07:14 +0200 (CEST) Received: from hermes.kaod.org (deibp9eh1--blueice2n7.emea.ibm.com [195.212.29.169]) (Authenticated sender: clg@kaod.org) by player728.ha.ovh.net (Postfix) with ESMTPSA id 41E905400A1; Tue, 4 Oct 2016 16:07:08 +0200 (CEST) To: Peter Maydell References: <1475583448-21013-1-git-send-email-clg@kaod.org> From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= Message-ID: <6bb27c6b-a26b-8469-167a-bc6eb087c9f8@kaod.org> Date: Tue, 4 Oct 2016 16:07:07 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 In-Reply-To: X-Ovh-Tracer-Id: 13227635059619826470 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelvddrvdejgdejtdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 188.165.53.149 Subject: Re: [Qemu-devel] [PATCH] qtest: add read/write accessors with a specific endianness X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Greg Kurz , QEMU Developers , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" On 10/04/2016 02:36 PM, Peter Maydell wrote: > On 4 October 2016 at 13:17, Cédric Le Goater wrote: >> Some test scenarios require to access memory regions using a specific >> endianness, such as a device region, but the current qtest memory >> accessors are done in native endian, which means that the values are >> byteswapped in qtest if the endianness of the guest and the host are >> different. >> >> To maintain the endianness of a value, we need a new set of memory >> accessor. This can be done in two ways: >> >> - first, convert the value to the required endianness in libqtest and >> then use the memread/write routines so that qtest accesses the guest >> memory without doing any supplementary byteswapping >> >> - an alternative method would be to handle the byte swapping on the >> qtest side. For that, we would need to extend the read/write >> protocol with an ending word : "native|le|be" and modify the tswap >> calls accordingly under the qtest_process_command() routine. >> >> The result is the same and the first method is simpler. > > The difficulty with this patch is that it's hard to tell whether > it's really required, or if this is just adding an extra layer > of byteswapping that should really be done in some other location > in the stack. What's the actual test case here? Hello, It's the m25p80 unit test I sent a while ago which was failing on a BE host (See below) The flash module is accessible through a memory window and, when in SPI mode, the commands are sent to the slave by writing at the beginning of the region. Addresses are necessarily BE to be understood by the SPI flash module. I understand that the tests for PPC64 PCI support will have similar needs. Thanks, C. From patchwork Tue Jun 28 18:24:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [v5,9/9] tests: add a m25p80 test From: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 641682 Message-Id: <1467138270-32481-10-git-send-email-clg@kaod.org> To: Peter Maydell , Peter Crosthwaite Cc: kwolf@redhat.com, Andrew Jeffery , qemu-devel@nongnu.org, armbru@redhat.com, qemu-arm@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Tue, 28 Jun 2016 20:24:30 +0200 This test uses the palmetto platform and the AST2400 SPI controller to test the m25p80 flash module device model. The flash model is defined by the platform (n25q256a) and it would be nice to find way to control it, using a property probably. Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell --- Changes since v5: - use the qtest _be accessors on the flash region. Changes since v4: - fixed Makefile targets - replaced -M with -m in qtest command line Changes since v2: - changed mkstemp() path prefix Changes since v1: - fixed guest args to use -drive and not -mtdblock tests/Makefile.include | 2 tests/m25p80-test.c | 241 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 243 insertions(+) create mode 100644 tests/m25p80-test.c Index: qemu-aspeed.git/tests/Makefile.include =================================================================== --- qemu-aspeed.git.orig/tests/Makefile.include +++ qemu-aspeed.git/tests/Makefile.include @@ -288,6 +288,7 @@ check-qtest-sparc64-y = tests/endianness check-qtest-arm-y = tests/tmp105-test$(EXESUF) check-qtest-arm-y += tests/ds1338-test$(EXESUF) +check-qtest-arm-y += tests/m25p80-test$(EXESUF) gcov-files-arm-y += hw/misc/tmp105.c check-qtest-arm-y += tests/virtio-blk-test$(EXESUF) gcov-files-arm-y += arm-softmmu/hw/block/virtio-blk.c @@ -618,6 +619,7 @@ tests/bios-tables-test$(EXESUF): tests/b tests/pxe-test$(EXESUF): tests/pxe-test.o tests/boot-sector.o $(libqos-obj-y) tests/tmp105-test$(EXESUF): tests/tmp105-test.o $(libqos-omap-obj-y) tests/ds1338-test$(EXESUF): tests/ds1338-test.o $(libqos-imx-obj-y) +tests/m25p80-test$(EXESUF): tests/m25p80-test.o tests/i440fx-test$(EXESUF): tests/i440fx-test.o $(libqos-pc-obj-y) tests/q35-test$(EXESUF): tests/q35-test.o $(libqos-pc-obj-y) tests/fw_cfg-test$(EXESUF): tests/fw_cfg-test.o $(libqos-pc-obj-y) Index: qemu-aspeed.git/tests/m25p80-test.c =================================================================== --- /dev/null +++ qemu-aspeed.git/tests/m25p80-test.c @@ -0,0 +1,241 @@ +/* + * QTest testcase for the M25P80 Flash (Using the AST2400 SPI Controller) + * + * Copyright (C) 2016 IBM Corp. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "libqtest.h" + +/* + * AST2400 SPI Controller registers + */ +#define R_CONF 0x00 +#define CONF_ENABLE_W0 (1 << 16) +#define R_CE_CTRL 0x04 +#define CRTL_EXTENDED0 0 /* 32 bit addressing for SPI */ +#define R_CTRL0 0x10 +#define CTRL_CE_STOP_ACTIVE (1 << 2) +#define CTRL_USERMODE 0x3 + +#define AST2400_FMC_BASE 0x1E620000 +#define AST2400_FLASH_BASE 0x20000000 + +/* + * Flash commands + */ +enum { + JEDEC_READ = 0x9f, + BULK_ERASE = 0xc7, + READ = 0x03, + PP = 0x02, + WREN = 0x6, + EN_4BYTE_ADDR = 0xB7, + ERASE_SECTOR = 0xd8, +}; + +#define FLASH_JEDEC 0x20ba19 /* n25q256a */ +#define FLASH_SIZE (32 * 1024 * 1024) + +#define PAGE_SIZE 256 + +static void spi_conf(uint32_t value) +{ + uint32_t conf = readl(AST2400_FMC_BASE + R_CONF); + + conf |= value; + writel(AST2400_FMC_BASE + R_CONF, conf); +} + +static void spi_ctrl_start_user(void) +{ + uint32_t ctrl = readl(AST2400_FMC_BASE + R_CTRL0); + + ctrl |= CTRL_USERMODE | CTRL_CE_STOP_ACTIVE; + writel(AST2400_FMC_BASE + R_CTRL0, ctrl); + + ctrl &= ~CTRL_CE_STOP_ACTIVE; + writel(AST2400_FMC_BASE + R_CTRL0, ctrl); +} + +static void spi_ctrl_stop_user(void) +{ + uint32_t ctrl = readl(AST2400_FMC_BASE + R_CTRL0); + + ctrl |= CTRL_USERMODE | CTRL_CE_STOP_ACTIVE; + writel(AST2400_FMC_BASE + R_CTRL0, ctrl); +} + +static void test_read_jedec(void) +{ + uint32_t jedec = 0x0; + + spi_conf(CONF_ENABLE_W0); + + spi_ctrl_start_user(); + writeb(AST2400_FLASH_BASE, JEDEC_READ); + jedec |= readb(AST2400_FLASH_BASE) << 16; + jedec |= readb(AST2400_FLASH_BASE) << 8; + jedec |= readb(AST2400_FLASH_BASE); + spi_ctrl_stop_user(); + + g_assert_cmphex(jedec, ==, FLASH_JEDEC); +} + +static void read_page(uint32_t addr, uint32_t *page) +{ + int i; + + spi_ctrl_start_user(); + + writeb(AST2400_FLASH_BASE, EN_4BYTE_ADDR); + writeb(AST2400_FLASH_BASE, READ); + writel_be(AST2400_FLASH_BASE, addr); + + /* Continuous read are supported */ + for (i = 0; i < PAGE_SIZE / 4; i++) { + page[i] = readl_be(AST2400_FLASH_BASE); + } + spi_ctrl_stop_user(); +} + +static void test_erase_sector(void) +{ + uint32_t some_page_addr = 0x600 * PAGE_SIZE; + uint32_t page[PAGE_SIZE / 4]; + int i; + + spi_conf(CONF_ENABLE_W0); + + spi_ctrl_start_user(); + writeb(AST2400_FLASH_BASE, WREN); + writeb(AST2400_FLASH_BASE, EN_4BYTE_ADDR); + writeb(AST2400_FLASH_BASE, ERASE_SECTOR); + writel_be(AST2400_FLASH_BASE, some_page_addr); + spi_ctrl_stop_user(); + + /* Previous page should be full of zeroes as backend is not + * initialized */ + read_page(some_page_addr - PAGE_SIZE, page); + for (i = 0; i < PAGE_SIZE / 4; i++) { + g_assert_cmphex(page[i], ==, 0x0); + } + + /* But this one was erased */ + read_page(some_page_addr, page); + for (i = 0; i < PAGE_SIZE / 4; i++) { + g_assert_cmphex(page[i], ==, 0xffffffff); + } +} + +static void test_erase_all(void) +{ + uint32_t some_page_addr = 0x15000 * PAGE_SIZE; + uint32_t page[PAGE_SIZE / 4]; + int i; + + spi_conf(CONF_ENABLE_W0); + + /* Check some random page. Should be full of zeroes as backend is + * not initialized */ + read_page(some_page_addr, page); + for (i = 0; i < PAGE_SIZE / 4; i++) { + g_assert_cmphex(page[i], ==, 0x0); + } + + spi_ctrl_start_user(); + writeb(AST2400_FLASH_BASE, WREN); + writeb(AST2400_FLASH_BASE, BULK_ERASE); + spi_ctrl_stop_user(); + + /* Recheck that some random page */ + read_page(some_page_addr, page); + for (i = 0; i < PAGE_SIZE / 4; i++) { + g_assert_cmphex(page[i], ==, 0xffffffff); + } +} + +static void test_write_page(void) +{ + uint32_t my_page_addr = 0x14000 * PAGE_SIZE; /* beyond 16MB */ + uint32_t some_page_addr = 0x15000 * PAGE_SIZE; + uint32_t page[PAGE_SIZE / 4]; + int i; + + spi_conf(CONF_ENABLE_W0); + + spi_ctrl_start_user(); + writeb(AST2400_FLASH_BASE, EN_4BYTE_ADDR); + writeb(AST2400_FLASH_BASE, PP); + writel_be(AST2400_FLASH_BASE, my_page_addr); + + /* Fill the page with its own addresses */ + for (i = 0; i < PAGE_SIZE / 4; i++) { + writel_be(AST2400_FLASH_BASE, my_page_addr + i * 4); + } + spi_ctrl_stop_user(); + + /* Check what was written */ + read_page(my_page_addr, page); + for (i = 0; i < PAGE_SIZE / 4; i++) { + g_assert_cmphex(page[i], ==, my_page_addr + i * 4); + } + + /* Check some other page. It should be full of 0xff */ + read_page(some_page_addr, page); + for (i = 0; i < PAGE_SIZE / 4; i++) { + g_assert_cmphex(page[i], ==, 0xffffffff); + } +} + +static char tmp_path[] = "/tmp/qtest.m25p80.XXXXXX"; + +int main(int argc, char **argv) +{ + int ret; + int fd; + char *args; + + g_test_init(&argc, &argv, NULL); + + fd = mkstemp(tmp_path); + g_assert(fd >= 0); + ret = ftruncate(fd, FLASH_SIZE); + g_assert(ret == 0); + close(fd); + + args = g_strdup_printf("-m 256 -machine palmetto-bmc " + "-drive file=%s,format=raw,if=mtd", + tmp_path); + qtest_start(args); + + qtest_add_func("/m25p80/read_jedec", test_read_jedec); + qtest_add_func("/m25p80/erase_sector", test_erase_sector); + qtest_add_func("/m25p80/erase_all", test_erase_all); + qtest_add_func("/m25p80/write_page", test_write_page); + + ret = g_test_run(); + + qtest_quit(global_qtest); + unlink(tmp_path); + g_free(args); + return ret; +}