From patchwork Mon Mar 15 15:38:42 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 48483 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D8833B7CA6 for ; Thu, 25 Mar 2010 11:45:51 +1100 (EST) Received: from localhost ([127.0.0.1]:51057 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NubCm-0005GM-Uv for incoming@patchwork.ozlabs.org; Wed, 24 Mar 2010 20:45:49 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Nub7d-0003ou-9Y for qemu-devel@nongnu.org; Wed, 24 Mar 2010 20:40:29 -0400 Received: from [140.186.70.92] (port=57539 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Nub7W-0003nX-36 for qemu-devel@nongnu.org; Wed, 24 Mar 2010 20:40:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Nub7R-0000ep-Ub for qemu-devel@nongnu.org; Wed, 24 Mar 2010 20:40:21 -0400 Received: from are.twiddle.net ([75.149.56.221]:53035) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Nub7R-0000eW-OW for qemu-devel@nongnu.org; Wed, 24 Mar 2010 20:40:17 -0400 Received: by are.twiddle.net (Postfix, from userid 5000) id D33CFC01; Wed, 24 Mar 2010 17:40:13 -0700 (PDT) Message-Id: <644bea4a77135bae7beb35519c62032201cd3198.1269476678.git.rth@twiddle.net> In-Reply-To: References: From: Richard Henderson Date: Mon, 15 Mar 2010 08:38:42 -0700 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 05/10] target-alpha: Implement cvtlq inline. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org It's a simple shift and mask sequence. Signed-off-by: Richard Henderson --- target-alpha/helper.h | 1 - target-alpha/op_helper.c | 7 ------- target-alpha/translate.c | 21 ++++++++++++++++++++- 3 files changed, 20 insertions(+), 9 deletions(-) diff --git a/target-alpha/helper.h b/target-alpha/helper.h index 10c78d0..ccf6a2a 100644 --- a/target-alpha/helper.h +++ b/target-alpha/helper.h @@ -83,7 +83,6 @@ DEF_HELPER_FLAGS_1(cvtqf, TCG_CALL_CONST, i64, i64) DEF_HELPER_FLAGS_1(cvtgf, TCG_CALL_CONST, i64, i64) DEF_HELPER_FLAGS_1(cvtgq, TCG_CALL_CONST, i64, i64) DEF_HELPER_FLAGS_1(cvtqg, TCG_CALL_CONST, i64, i64) -DEF_HELPER_FLAGS_1(cvtlq, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64) DEF_HELPER_FLAGS_1(cvttq, TCG_CALL_CONST, i64, i64) DEF_HELPER_FLAGS_1(cvttq_c, TCG_CALL_CONST, i64, i64) diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c index f9cd07a..a209130 100644 --- a/target-alpha/op_helper.c +++ b/target-alpha/op_helper.c @@ -1152,13 +1152,6 @@ uint64_t helper_cvtqg (uint64_t a) return float64_to_g(fr); } -uint64_t helper_cvtlq (uint64_t a) -{ - int32_t lo = a >> 29; - int32_t hi = a >> 32; - return (lo & 0x3FFFFFFF) | (hi & 0xc0000000); -} - /* PALcode support special instructions */ #if !defined (CONFIG_USER_ONLY) void helper_hw_rei (void) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 44ce830..90a14f5 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -597,6 +597,26 @@ static inline void gen_fp_exc_raise(int rc, int fn11) gen_fp_exc_raise_ignore(rc, fn11, fn11 & QUAL_I ? 0 : float_flag_inexact); } +static void gen_fcvtlq(int rb, int rc) +{ + if (unlikely(rc == 31)) { + return; + } + if (unlikely(rb == 31)) { + tcg_gen_movi_i64(cpu_fir[rc], 0); + } else { + TCGv tmp = tcg_temp_new(); + + tcg_gen_shri_i64(tmp, cpu_fir[rb], 32); + tcg_gen_shri_i64(cpu_fir[rc], cpu_fir[rb], 29); + tcg_gen_andi_i64(tmp, tmp, 0xc0000000); + tcg_gen_andi_i64(cpu_fir[rc], cpu_fir[rc], 0x3FFFFFFF); + tcg_gen_or_i64(cpu_fir[rc], cpu_fir[rc], tmp); + + tcg_temp_free(tmp); + } +} + static void gen_fcvtql(int rb, int rc) { if (unlikely(rc == 31)) { @@ -646,7 +666,6 @@ static inline void glue(gen_f, name)(int rb, int rc) \ tcg_temp_free(tmp); \ } \ } -FARITH2(cvtlq) /* ??? VAX instruction qualifiers ignored. */ FARITH2(sqrtf)