From patchwork Thu Sep 13 20:12:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Baron X-Patchwork-Id: 183714 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EC55A2C0079 for ; Fri, 14 Sep 2012 06:31:31 +1000 (EST) Received: from localhost ([::1]:58821 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TCFmW-0001De-7i for incoming@patchwork.ozlabs.org; Thu, 13 Sep 2012 16:13:00 -0400 Received: from eggs.gnu.org ([208.118.235.92]:53148) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TCFmG-0000o0-4N for qemu-devel@nongnu.org; Thu, 13 Sep 2012 16:12:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TCFmB-0002sU-Us for qemu-devel@nongnu.org; Thu, 13 Sep 2012 16:12:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34838) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TCFmB-0002sF-KV for qemu-devel@nongnu.org; Thu, 13 Sep 2012 16:12:39 -0400 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q8DKCbuK017798 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 13 Sep 2012 16:12:38 -0400 Received: from redhat.com (dhcp-185-114.bos.redhat.com [10.16.185.114]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id q8DKCbMl028684; Thu, 13 Sep 2012 16:12:37 -0400 Date: Thu, 13 Sep 2012 16:12:37 -0400 From: Jason Baron To: qemu-devel@nongnu.org Message-Id: <5990b8d1b1317dd3b84abc1da4fa673b4f313b14.1347561356.git.jbaron@redhat.com> In-Reply-To: References: X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: aliguori@us.ibm.com, alex.williamson@redhat.com, mst@redhat.com, jan.kiszka@siemens.com, agraf@suse.de, armbru@redhat.com, yamahata@valinux.co.jp, juzhang@redhat.com, kevin@koconnor.net, avi@redhat.com, mkletzan@redhat.com, lcapitulino@redhat.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH 03/25] pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Isaku Yamahata Introduce pci_swizzle_map_irq_fn() for interrupt pin swizzle which is standardized. PCI bridge swizzle is common logic, by introducing this function duplicated swizzle logic will be avoided later. Signed-off-by: Isaku Yamahata Signed-off-by: Jason Baron --- hw/pci.c | 18 ++++++++++++++++++ hw/pci.h | 2 ++ 2 files changed, 20 insertions(+), 0 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 1c847c5..55e4ad3 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -1121,6 +1121,24 @@ void pci_device_set_intx_routing_notifier(PCIDevice *dev, dev->intx_routing_notifier = notifier; } +/* + * PCI-to-PCI bridge specification + * 9.1: Interrupt routing. Table 9-1 + * + * the PCI Express Base Specification, Revision 2.1 + * 2.2.8.1: INTx interrutp signaling - Rules + * the Implementation Note + * Table 2-20 + */ +/* + * 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD + * 0-origin unlike PCI interrupt pin register. + */ +int pci_swizzle_map_irq_fn(void *opaque, PCIDevice *pci_dev, int pin) +{ + return (pin + PCI_SLOT(pci_dev->devfn)) % PCI_NUM_PINS; +} + /***********************************************************/ /* monitor info on PCI */ diff --git a/hw/pci.h b/hw/pci.h index 26dc522..47ae740 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -316,6 +316,8 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque, int nirq); int pci_bus_get_irq_level(PCIBus *bus, int irq_num); void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug, DeviceState *dev); +/* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */ +int pci_swizzle_map_irq_fn(void *opaque, PCIDevice *pci_dev, int pin); PCIBus *pci_register_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque,